Practical case: Identify the correct polarity

Materials

• 1 × C1: Electrolytic capacitor under test (CUT), 10–100 µF
• 1 × R1: 10 kΩ resistor (series, 1/4 W)
• 1 × R2: 1 kΩ resistor (for discharge, optional but recommended)
• 1 × DC source: 3 V (two AA cells, or bench supply limited to ≤5 mA)
• 1 × Digital multimeter (DMM), DC volts mode
• Breadboard or clip leads, and wires

Wiring guide

• Power off the DC source while wiring.
• Connect +V from the DC source to one side of R1. Connect the other side of R1 to a central test node.
• Connect C1 between the test node (top of C1) and GND (bottom of C1). Orientation is unknown; this is what we will determine.
• Do not exceed 3 V for this test; keep the supply current-limited (≤5 mA).
• Measurement points in the schematic:
• DMM+ and DMM−: positive and negative DMM probes used to measure V_C (voltage across C1, top minus bottom).
• VR+ and VR−: positive and negative DMM probes used to measure V_R (voltage drop across R1, +V minus test node).
• Keep R2 aside to discharge C1 safely between trials by briefly placing it across C1 (top to bottom).

Schematic

             +5 V de la fuente
                  │
                  ● V_IN
                  │
                ┌┴┐
                │ │
                │ │
                └┬┘   R1 = 1 kΩ (limitación)
                  │
                  ● V_C+
                  │
                ┌┴┐
                │ │
                │ │
                └┬┘   C1 = 100 µF 16 V (electrolítico, polarizado; (+) arriba)
                  │
                  ● V_C-
                  │
                 GND

Measurements and tests

• Preparation:

  • Set the DMM to DC volts (2–20 V range).
  • Abbreviations:
    • V_C: DMM reading between DMM+ and DMM− (capacitor top minus bottom).
    • V_R: DMM reading between VR+ and VR− (drop across R1).
    • I_leak: leakage current through C1, computed as I_leak = V_R / R1.

• Test 1 (orientation A):

  • Power on the 3 V source.
  • Measure V_C at DMM+/DMM− after 10–30 s.
  • Measure V_R at VR+/VR− after 10–30 s.
  • Compute I_leak = V_R / 10,000.

• Discharge before changing orientation:

  • Power off.
  • Briefly connect R2 across C1 (top to bottom) for 2–3 s to discharge.
  • Confirm V_C ≈ 0 V.

• Test 2 (orientation B):

  • Reverse C1 (swap its two leads at the node and GND).
  • Repeat the same V_C and V_R measurements and compute I_leak.

• Interpreting results:

  • Correct polarity orientation:
    • V_C ≈ +V (typically 2.8–3.0 V).
    • V_R → near 0 V after charging (often <10 mV).
    • I_leak very small (microamps to a few tens of microamps for good parts).
  • Reverse polarity orientation:
    • V_R remains noticeably above 0 V (tens to hundreds of millivolts or more), indicating higher steady leakage.
    • I_leak is larger and does not decay to near zero.
  • Decision:
    • The orientation that produced the lower steady V_R (lower I_leak) is the correct polarity. The lead of C1 that was connected to +V in that orientation is the positive terminal of the capacitor.

Common mistakes and safety

• Do not exceed ~3 V for this identification test; keep current limited (≤5 mA). Higher voltage or current can damage a reversed electrolytic.
• Always discharge C1 with R2 before touching or reversing it.
• Stop immediately if you notice heating, hissing, or smell—electrolytic capacitors can vent if stressed.
• Remember: on most electrolytics the printed stripe marks the negative terminal; the can shell is often negative; a longer lead (on new parts) usually indicates positive.
• Tantalum capacitors are more sensitive to reverse bias—use ≤2 V and a larger series resistor (e.g., 22–47 kΩ).

Improvements

• Measure current directly with the DMM in mA mode in series with +V, keeping a series resistor and current limit for safety.
• Use a bench supply with current limit set to ≤1 mA for clearer leakage readings.
• Log V_R over time to observe the decay curve; the correct polarity will decay toward zero faster and further than the reverse case.

More Practical Cases on Prometeo.blog

Carlos Núñez Zorrilla

Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

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