Objective and use case
What you’ll build: A simple buck converter that drops voltage from 12 V to 5 V, demonstrating the impact of the inductor on current ripple and output quality.
Why it matters / Use cases
- Power supply design for microcontrollers requiring stable 5 V input.
- Battery management systems where efficient voltage regulation is critical.
- LED drivers that need precise voltage control to maintain brightness.
- Portable devices that rely on buck converters for energy efficiency.
Expected outcome
- Output voltage stabilized at approximately 5 V with a tolerance of ±0.1 V.
- Current ripple measured at less than 200 mA at full load.
- Efficiency of the buck converter exceeding 85% under typical load conditions.
- Output voltage ripple not exceeding 50 mV peak-to-peak.
Audience: Electronics enthusiasts; Level: Basic
Architecture/flow: Input from a 12 V bench power supply, through LM2596-ADJ, with output filtered by C2 and loaded by RL.
Materials
- 1 × U1: LM2596-ADJ buck regulator IC (or equivalent controller)
- 1 × L1: 47 µH inductor (≥2 A, low DCR)
- 1 × D1: SS34 Schottky diode (3 A, 40 V)
- 1 × C1: 100 µF, 25 V electrolytic (input)
- 1 × C2: 220 µF, 10–16 V low-ESR electrolytic (output)
- 1 × R1: 3.0 kΩ (feedback, Vout set)
- 1 × R2: 1.0 kΩ (feedback, Vout set)
- 1 × RS: 0.10 Ω, 2 W current sense resistor (optional, for IL measurement)
- 1 × RL: 10 Ω, 10 W load resistor
- 1 × Bench power supply: 12 V, ≥2 A
- 1 × Oscilloscope (2 channels) and probes, or multimeter
- Hookup wires, breadboard or protoboard (preferably through-hole parts)
Note on R1/R2: LM2596 Vref ≈ 1.23 V, Vout ≈ Vref(1 + R1/R2). With R1=3.0 kΩ, R2=1.0 kΩ → Vout ≈ 4.92 V (close to 5 V).
Wiring guide
- Power and input decoupling:
- Connect +12 V from the bench supply to the +VIN node; connect supply ground to GND.
- Place C1 between +12 V and GND as close as possible to U1 VIN and GND pins.
- Buck controller U1 (LM2596-ADJ):
- VIN pin to +12 V node; GND pin to GND.
- ON/OFF pin tied to VIN (always enabled).
- SW pin goes to the switch node (VSW).
- FB pin goes to the feedback divider midpoint between R1 and R2.
- Power stage:
- From the SW node:
- Down to GND through D1 (anode at GND, cathode at SW).
- Down through L1 in series with RS to the VOUT node.
- From VOUT to GND place C2 and RL (in parallel).
- Feedback network (to set ~5 V):
- R1 from VOUT up to the FB node; R2 from FB node down to GND; connect FB node to U1 FB pin.
- Measurement abbreviations and where to probe:
- VSW: switch node voltage (black dot labeled VSW).
- VRS: sense point at the junction between L1 and RS (black dot labeled VRS). Measure VRS−VOUT to compute inductor current: IL ≈ (VRS − VOUT)/RS.
- VOUT: output voltage node after RS (black dot labeled VOUT).
Schematic
+12 V
│ ● Vin
├─────────┬───────────────┐
│ │ │
┌───────┐ │ ┌───────┐
│ │ │ │ │
│ C3 │ │ │ C2 │
│ 47µF │ │ │ 100nF │
│ 25V │ │ │ │
└───────┘ │ └───────┘
│ │ │
│ │ │
│ ┌───────┐ │
│ │ │ │
│ │ R1 │ 100kΩ │
│ │ 100kΩ │ │
│ └───────┘ │
│ │ │
│ └─────┬─────────┘
│ │
┌─────────┐ │
│ │ │
│ Q1 │ P‑MOSFET
│ │ AO4407A
└─────────┘
│
│
● Vsw ├───────────────┬─────────────┐
│ │ │
│ ┌─────────┐ │
│ │ │ │
│ │ D1 │ SS34 │
│ │ │ │
│ └─────────┘ │
│ │ │
│ │ │
┌─────────┐ │ │
│ │ │ │
│ L1 │ 220µH │ │
│ │ │ │
└─────────┘ │ │
│ │ │
● Rs+ │ │ │
│ │ │
┌─────────┐ │ │
│ │ │ │
│ RS1 │ 0.10Ω │ │
│ │ │ │
└─────────┘ │ │
│ │ │
● Vout ├───────────────┴─────────┬───┘
│ │
┌─────────┐ ┌─────────┐
│ │ │ │
│ C1 │ 100µF 16V │ RLOAD │ 10Ω 5W
│ │ │ │
└─────────┘ └─────────┘
│ │
└───────────────┬─────────┘
│
GND
┌─────────┐
│ │
│ R2 │ 100Ω
│ │
└─────────┘
│
│
┌────────────────┴──────────────┐
│ │
┌─────────┐ ┌───────┐
│ │ │ │
│ DRV PWM │ 0–100 kHz │ GND │
│ 0/12 V │ Vcc→+12V │ Node │
└─────────┘ └───────┘
● Rs- colocado en el nodo Vout (referencia inferior de RS1)Note: All rectangles are components; text labels are placed outside them. Black dots indicate measurement points: VSW, VRS, VOUT.
Measurements and tests
- Before power-up:
- Check polarity and orientation:
- D1 cathode to VSW, anode to GND; capacitors’ “+” to +12 V (C1) and VOUT (C2).
- L1 in series from VSW to RS, then to VOUT; no shorts to GND.
- Verify feedback values:
- R1 = 3.0 kΩ to VOUT; R2 = 1.0 kΩ to GND; midpoint to U1 FB.
- Check polarity and orientation:
- Power-up at no-load:
- Set the bench supply to 12 V with current limit ~1 A.
- Probe VOUT:
- Measure at ● VOUT to GND: expect ~4.9–5.1 V.
- Load test (DC):
- Connect RL = 10 Ω to VOUT and GND.
- Measure VOUT at ● VOUT to GND:
- Expect ~4.8–5.0 V (load regulation).
- Estimate output current:
- IOUT ≈ VOUT / RL ≈ 5 V / 10 Ω = 0.5 A.
- Switch node observation:
- Probe VSW at ● VSW to GND (oscilloscope):
- Expect pulsed waveform between ~0 V and ~12 V with duty ≈ VOUT/VIN ≈ 5/12 ≈ 42%.
- Check for clean transitions; ringing can occur if wiring is long.
- Probe VSW at ● VSW to GND (oscilloscope):
- Inductor current via sense resistor:
- Measure VRS between ● VRS and ● VOUT (differential):
- Use two scope channels and math (CH_VRS − CH_VOUT) or a differential probe, or a multimeter across RS.
- Compute IL: IL(t) ≈ (VRS − VOUT) / RS; with RS = 0.10 Ω, 50 mV corresponds to 0.5 A.
- Observe triangular ripple; peak-to-peak ripple ΔIL should be modest (e.g., 0.1–0.3 A at ~50–150 kHz typical).
- Measure VRS between ● VRS and ● VOUT (differential):
- Ripple at output:
- Probe VOUT at ● VOUT to GND (AC-coupled, short ground lead):
- Expect ripple <50–100 mVpp with low-ESR C2 and proper layout.
- Probe VOUT at ● VOUT to GND (AC-coupled, short ground lead):
- Optional comparison (effect of L1 value):
- Replace L1 with 100 µH (same current rating) keeping RS.
- Repeat VOUT, VSW, and IL measurements:
- Expect lower ΔIL and lower VOUT ripple, but slower transient response.
- Repeat VOUT, VSW, and IL measurements:
- Replace L1 with 100 µH (same current rating) keeping RS.
Explanations of abbreviations:
– VSW: Switch node voltage (U1 SW pin node).
– VRS: Node at the junction of L1 and RS; use VRS − VOUT to compute inductor current.
– VOUT: Output voltage node after RS (at the load and output capacitor).
Common mistakes
- Wrong diode orientation (D1 must have anode at GND, cathode at SW).
- Inductor underrated (saturating core) → excessive ripple, heating, or collapsing VOUT.
- Long loop from VIN → U1 → D1/L1 → GND causing ringing and noise; keep loops short and C1/C2 close.
- Feedback wiring picking up switch noise; keep FB divider close to U1 FB and route away from VSW.
Safety and good practices
- Set current limit on the bench supply before first power-up.
- Inductors and D1 can get warm; verify temperature stays safe.
- Beware of probe ground leads forming loops at VSW; use short ground springs for clean waveforms.
Improvements
- Add a small ceramic capacitor (e.g., 1–4.7 µF) in parallel with C2 to reduce high-frequency ripple.
- Snubber or RC damping at VSW if severe ringing is observed.
- Try different L1 values to see the trade-off between ripple, transient response, and inductor size.
Validation: The schematic includes all components from the materials list, all pins and connections are shown and properly connected, and measurement points are clearly marked with black dots and explained.
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Quick Quiz
Carlos Núñez Zorrilla
Electronics & Computer Engineer
Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).
