Practical case: Base Biasing with Resistor

Base Biasing with Resistor prototype (Maker Style)

Level: Medium — Calculate and verify a base resistor to switch an NPN transistor safely from a logic output.

Objective and use case

You will build a simple transistor switch where a 5 V logic output drives an NPN transistor through a base resistor. The goal is to choose the resistor so the transistor turns the load on reliably without exceeding the allowed logic output current.

Why it is useful:
– To drive a relay module, buzzer, or small lamp from a microcontroller pin.
– To control loads that require more current than a logic output can supply directly.
– To protect a logic output from excessive base current.
– To learn how to verify transistor saturation with real voltage and current measurements.

Expected outcome:
– When the logic output is LOW, the transistor remains OFF and the load is de-energized.
– When the logic output is HIGH, the transistor turns ON and the load current is about 20 mA.
– Base current stays below the logic output limit, target about 4.3 mA.
– Measured base-emitter voltage is about 0.7 V when ON.
– Measured collector-emitter voltage is low in saturation, typically below 0.2 V.

Target audience and level: Students with basic DC circuit and transistor knowledge.

Materials

  • V1: 5 V DC supply
  • VSIG: 0 V / 5 V logic source, function: control signal for transistor base
  • R1: 1 kΩ resistor, function: base current limiting
  • R2: 150 Ω resistor, function: load current limiting for LED branch
  • D1: red LED, function: visible collector load indicator
  • Q1: 2N2222 NPN transistor, function: low-side switch
  • M1: digital multimeter, function: voltage and current measurements
  • M2: optional second multimeter, function: simultaneous current check

Wiring guide

Use these node names: VCC, 0, VIN, VB, VC.

  • V1 connects between VCC and 0.
  • VSIG connects between VIN and 0.
  • R1 connects between VIN and VB.
  • Q1 collector connects to VC.
  • Q1 base connects to VB.
  • Q1 emitter connects to 0.
  • R2 connects between VCC and the anode node of D1.
  • D1 anode connects to R2; D1 cathode connects to VC.

Practical design values:
– Load current target: about Ic = (5 V - 2.0 V - 0.2 V) / 150 Ω ≈ 18.7 mA
– Forced gain for saturation: use β_forced ≈ 10
– Required base current: Ib ≈ Ic / 10 ≈ 1.9 mA
– Base resistor estimate: R1 ≈ (5 V - 0.7 V) / 1.9 mA ≈ 2.26 kΩ

To make switching more robust, choose a lower standard value:
– Selected R1 = 1 kΩ
– Expected base current: Ib ≈ (5 V - 0.7 V) / 1 kΩ ≈ 4.3 mA

This value is suitable only if the logic output can safely source at least 4.3 mA.

Conceptual block diagram

Conceptual block diagram — Base-biased NPN switch
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

Practical case: Base Biasing with Resistor

Power / load path:
[ V1: 5 V DC Supply ] --(VCC)--> [ R2: 150 ohm ] --(LED current limit)--> [ D1: Red LED ] --(cathode at VC)--> [ Q1:C 2N2222 ]
[ Q1:C 2N2222 ] --(collector-emitter path)--> [ Q1:E 2N2222 ] --(0 / GND)--> [ V1: 0 V ]

Control / base path:
[ VSIG: 0/5 V Logic Source ] --(VIN)--> [ R1: 1 kohm ] --(VB)--> [ Q1:B 2N2222 ]
[ Q1:B 2N2222 ] --(base-emitter junction)--> [ Q1:E 2N2222 ] --(0 / GND)--> [ VSIG: 0 V ]

Node labels:
[ VIN ] --> [ R1 ] --> [ VB ] --> [ Q1:B ]
[ VCC ] --> [ R2 ] --> [ D1 Anode ]
[ D1 Cathode ] --> [ VC ] --> [ Q1:C ]
[ Q1:E ] --> [ 0 / GND ]

Optional measurements:
[ M1 DMM ] --(measure V_B or V_C vs 0)--> [ VB / VC ] --> [ 0 / GND ]
[ M2 DMM ] --(current mode, inserted in series where needed)--> [ Base path or Load path ]
Electrical Schematic

Electrical diagram

Electrical diagram for Practical case: Base biasing with resistor
Generated from the validated SPICE netlist for this case.

🔒 This electrical diagram is premium. With the 7-day pass or the monthly membership you can unlock the complete didactic material and the print-ready PDF pack.🔓 See premium access plans

Measurements and tests

  1. Power-off check
  2. Verify all connections before applying power.
  3. Confirm Q1 emitter goes to 0.
  4. Confirm R1 is in series between VIN and VB.

  5. OFF-state test

  6. Set VSIG = 0 V.
  7. Measure Vb from VB to 0: expected near 0 V.
  8. Measure Vce from VC to 0: expected near 5 V.
  9. Observe D1: it should be OFF.
  10. Measure Ib: expected approximately 0 mA.
  11. Measure Ic: expected approximately 0 mA.

  12. ON-state test

  13. Set VSIG = 5 V.
  14. Measure Vb: expected about 0.7 V.
  15. Measure Vbe: expected about 0.65 V to 0.8 V.
  16. Measure Ib by placing the meter in series with R1: expected about 4.3 mA.
  17. Measure Vc: expected low, typically below 0.2 V to 0.3 V.
  18. Measure Vce: expected below 0.2 V if saturation is achieved.
  19. Measure Ic in series with the collector path: expected about 18 mA to 20 mA.
  20. Observe D1: it should be clearly ON.

  21. Logic output safety check

  22. Compare the measured Ib with the maximum source current allowed by the logic output.
  23. If the logic output rating is less than the measured base current, increase R1.

  24. Verification calculation

  25. Compute measured gain in switching mode: Ic / Ib.
  26. Example with measured values: 19 mA / 4.3 mA ≈ 4.4
  27. This is consistent with saturated switching, where the transistor is intentionally overdriven.

  28. Pass criteria

  29. Ib does not exceed the logic output limit.
  30. D1 turns fully ON at logic HIGH and fully OFF at logic LOW.
  31. Vce in ON state is low enough to confirm saturation.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: Base Biasing with Resistor
.width out=256

V1 VCC 0 DC 5
VSIG VIN 0 PULSE(0 5 10m 1u 1u 245m 1s)

R1 VIN VB 1k
R2 VCC VLED 150
D1 VLED VC DRED
Q1 VC VB 0 Q2N2222

* Optional multimeter loading approximations (high impedance voltmeters)
RM1 VC 0 10Meg
RM2 VB 0 10Meg

* Alias nodes for guaranteed logging
VALIASIN IN VIN 0
VALIASOUT OUT VC 0

.model DRED D(IS=1e-18 N=2.0 RS=10 CJO=20p VJ=0.75 M=0.5 TT=50n BV=5 IBV=10u)
* ... (truncated in public view) ...

Copy this content into a .cir file and run with ngspice.

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* Practical case: Base Biasing with Resistor
.width out=256

V1 VCC 0 DC 5
VSIG VIN 0 PULSE(0 5 10m 1u 1u 245m 1s)

R1 VIN VB 1k
R2 VCC VLED 150
D1 VLED VC DRED
Q1 VC VB 0 Q2N2222

* Optional multimeter loading approximations (high impedance voltmeters)
RM1 VC 0 10Meg
RM2 VB 0 10Meg

* Alias nodes for guaranteed logging
VALIASIN IN VIN 0
VALIASOUT OUT VC 0

.model DRED D(IS=1e-18 N=2.0 RS=10 CJO=20p VJ=0.75 M=0.5 TT=50n BV=5 IBV=10u)
.model Q2N2222 NPN(IS=1e-14 BF=200 VAF=100 IKF=0.1 ISE=1e-13 NE=1.5 BR=5 NR=1.0 VAR=25 IKR=0.05
+ RC=0.5 RE=0.2 RB=10 CJE=25p VJE=0.75 MJE=0.33 TF=0.4n XTF=2 CJC=8p VJC=0.55 MJC=0.33 TR=50n)

.save V(IN) V(OUT) V(VIN) V(VC) V(VB) V(VLED) I(V1) I(VSIG)

.op
.print op V(IN) V(OUT) V(VIN) V(VC) V(VB) V(VLED) I(V1) I(VSIG)

.tran 0.1m 250m
.print tran V(IN) V(OUT) V(VIN) V(VC) V(VB) V(VLED) I(V1) I(VSIG)

.end

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)
Show raw data table (2528 rows)
Index   time            v(in)           v(out)          v(vin)          v(vc)           v(vb)           v(vled)         v1#branch       vsig#branch
0	0.000000e+00	0.000000e+00	3.623103e+00	0.000000e+00	3.623103e+00	3.624741e-09	4.999946e+00	-3.62318e-07	3.624741e-12
1	1.000000e-06	0.000000e+00	3.623104e+00	0.000000e+00	3.623104e+00	6.699379e-09	4.999946e+00	-3.62321e-07	6.699379e-12
2	2.000000e-06	0.000000e+00	3.623105e+00	0.000000e+00	3.623105e+00	6.506970e-09	4.999946e+00	-3.62321e-07	6.506970e-12
3	4.000000e-06	0.000000e+00	3.623106e+00	0.000000e+00	3.623106e+00	5.984372e-09	4.999946e+00	-3.62320e-07	5.984372e-12
4	8.000000e-06	0.000000e+00	3.623108e+00	0.000000e+00	3.623108e+00	5.188535e-09	4.999946e+00	-3.62320e-07	5.188535e-12
5	1.600000e-05	0.000000e+00	3.623110e+00	0.000000e+00	3.623110e+00	4.293865e-09	4.999946e+00	-3.62319e-07	4.293865e-12
6	3.200000e-05	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.693772e-09	4.999946e+00	-3.62318e-07	3.693772e-12
7	6.400000e-05	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.610539e-09	4.999946e+00	-3.62318e-07	3.610539e-12
8	1.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.631021e-09	4.999946e+00	-3.62318e-07	3.631021e-12
9	2.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.621414e-09	4.999946e+00	-3.62318e-07	3.621414e-12
10	3.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.626121e-09	4.999946e+00	-3.62318e-07	3.626121e-12
11	4.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.624676e-09	4.999946e+00	-3.62318e-07	3.624676e-12
12	5.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.623957e-09	4.999946e+00	-3.62318e-07	3.623957e-12
13	6.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.626113e-09	4.999946e+00	-3.62318e-07	3.626113e-12
14	7.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.623011e-09	4.999946e+00	-3.62318e-07	3.623011e-12
15	8.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.626745e-09	4.999946e+00	-3.62318e-07	3.626745e-12
16	9.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.622584e-09	4.999946e+00	-3.62318e-07	3.622584e-12
17	1.028000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.627045e-09	4.999946e+00	-3.62318e-07	3.627045e-12
18	1.128000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.622367e-09	4.999946e+00	-3.62318e-07	3.622367e-12
19	1.228000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.627168e-09	4.999946e+00	-3.62318e-07	3.627168e-12
20	1.328000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.622305e-09	4.999946e+00	-3.62318e-07	3.622305e-12
21	1.428000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.627229e-09	4.999946e+00	-3.62318e-07	3.627229e-12
22	1.528000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.622257e-09	4.999946e+00	-3.62318e-07	3.622257e-12
23	1.628000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.627228e-09	4.999946e+00	-3.62318e-07	3.627228e-12
... (2504 more rows) ...

Common mistakes and how to avoid them

  1. Using no base resistor
  2. Error: connecting the logic output directly to the transistor base.
  3. Result: excessive base current and possible damage to the logic output.
  4. Fix: always place R1 between VIN and VB.

  5. Choosing a base resistor that is too large

  6. Error: using R1 = 10 kΩ without checking current.
  7. Result: base current may be too low, so the transistor may not saturate.
  8. Fix: calculate Ib from the load current and use a forced gain of about 10 for switching.

  9. Reversing transistor terminals

  10. Error: swapping collector and emitter.
  11. Result: abnormal voltages, weak load current, or no switching.
  12. Fix: confirm the 2N2222 pinout from its datasheet before wiring.

Troubleshooting

  • Symptom: LED never turns ON
  • Cause: VSIG is not reaching 5 V, or Q1 base is not connected through R1.
  • Fix: measure VIN and VB; verify R1 continuity and transistor pinout.

  • Symptom: LED is dim

  • Cause: transistor is not saturated because R1 is too large.
  • Fix: reduce R1 after checking the logic output current limit.

  • Symptom: Logic output voltage drops when ON

  • Cause: base current demand is too high for the logic source.
  • Fix: increase R1 or use a transistor driver stage.

  • Symptom: LED stays ON all the time

  • Cause: wrong wiring at the collector node or unintended base bias.
  • Fix: check that Q1 emitter is at 0 and that VIN actually goes to 0 V in the LOW state.

  • Symptom: Measured Vce is high when ON

  • Cause: insufficient base current or incorrect collector load wiring.
  • Fix: verify Ib, recalculate R1, and check R2 and D1 orientation.

Possible improvements and extensions

  • Add a 10 kΩ pull-down resistor from VB to 0 so the transistor stays OFF if the logic source becomes disconnected or high-impedance.
  • Replace the LED load with a relay coil and add a flyback diode across the coil to study transistor switching with inductive loads.

More Practical Cases on Prometeo.blog

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Quick Quiz

Question 1: What is the main purpose of the base resistor in the 5 V logic-driven NPN switch?




Question 2: According to the article, what load current is expected when the transistor is ON?




Question 3: What is the target base current mentioned for reliable switching?




Question 4: If the logic output is HIGH at 5 V and the base-emitter voltage is about 0.7 V, what voltage is approximately across the 1 kΩ base resistor?




Question 5: Using the article values, what base current flows through a 1 kΩ resistor when driven from 5 V with V_BE about 0.7 V?




Question 6: Why is a forced beta of around 5 reasonable here?




Question 7: What collector-emitter voltage indicates the transistor is in saturation according to the article?




Question 8: What should happen when the logic output is LOW?




Question 9: Which transistor is used as the low-side switch in this example?




Question 10: If a microcontroller pin can safely supply up to 5 mA, is the article's target base current acceptable?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

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Practical case: Vault Lock with Delay and Power Drive

Vault Lock with Delay and Power Drive prototype (Maker Style)

Level: Basic. Build a secure electronic lock that keeps a solenoid active for a few seconds after two keys are turned simultaneously.

Objective and use case

In this practical case, you will build a security circuit that requires two distinct inputs (keys/buttons) to be activated simultaneously to trigger a high-power mechanism. Once triggered, the system includes an analog memory (RC network) to hold the lock open for a short duration, allowing a user to open the door.

  • Real-world scenarios:

    • Bank Vaults: Requires two bank managers to turn keys at the same time to prevent theft.
    • Industrial Presses: Requires an operator to press buttons with both hands to ensure safety before the machine engages.
    • Secure Entryways: Allows a door strike to remain unlatched for 5 seconds after authorization.
  • Expected outcome:

    • Logic: The load (Solenoid/LED) remains OFF if only one button is pressed.
    • Activation: The load turns ON fully only when both SW1 and SW2 are held.
    • Timing: Upon releasing the buttons, the load remains ON for approximately 2 to 5 seconds before fading out.
    • Target audience: Basic electronics students focusing on transistor switching and RC time constants.

Materials

  • V1: 12 V DC supply, function: Main power source.
  • SW1: Push button (Normally Open), function: Security Key 1.
  • SW2: Push button (Normally Open), function: Security Key 2.
  • R1: 1 kΩ resistor, function: Current limiter for capacitor charging (protection).
  • R2: 47 kΩ resistor, function: Discharge timing resistor (Bleeder).
  • C1: 100 µF electrolytic capacitor, function: Energy storage for time delay.
  • Q1: IRF540 N-Channel MOSFET, function: Power switch for the load.
  • L1: 10 mH inductor, function: Solenoid coil simulation.
  • R3: 10 Ω resistor, function: Internal resistance of the solenoid.
  • D1: 1N4007 Diode, function: Flyback protection against inductive voltage spikes.

Wiring guide

This guide uses the node names 12 V, 0 (Ground), Mid_Switch, Gate_Node, and Drain_Node.

  • Logic Stage (Series AND):

    • V1 (Positive) connects to SW1 (Input).
    • SW1 (Output) connects to Mid_Switch.
    • SW2 (Input) connects to Mid_Switch.
    • SW2 (Output) connects to R1 (Input).
  • Timing Stage (RC Hold):

    • R1 (Output) connects to Gate_Node.
    • C1 (Positive) connects to Gate_Node.
    • C1 (Negative) connects to 0.
    • R2 connects between Gate_Node and 0 (Parallel to C1).
    • Q1 (Gate) connects to Gate_Node.
  • Power Stage:

    • Q1 (Source) connects to 0.
    • Q1 (Drain) connects to Drain_Node.
    • L1 and R3 (representing the Solenoid) are connected in series between 12 V and Drain_Node.
    • D1 (Cathode) connects to 12 V.
    • D1 (Anode) connects to Drain_Node (across the load).

Conceptual block diagram

Conceptual block diagram — CD40106 Transistor
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

Title: Practical case: Vault Lock with Delay and Power Drive

(1) LOGIC & TIMING STAGE
------------------------
                                                                    (Gate_Node)
[ 12 V ] --(Logic)--> [ SW1 ] --> [ SW2 ] --> [ R1: 1k ] --+------------+----------> [ Q1:Gate ]
                                                          |            |                |
                                                          |            |                |
                                                          v            v                |
                                                    [ C1: 100uF ]  [ R2: 47k ]          |
                                                          |            |                |
                                                          v            v                |
                                                         GND          GND               |
                                                                                        |
(2) POWER DRIVE STAGE                                                                   |
---------------------                                                                   |
                                                                                        |
[ 12 V ] --(Power)-----------------------------------------+                             |
   |                                                      |                             |
   |                                                      v                             |
   |                                              [ Solenoid (L1+R3) ]                  |
   |                                                      |                             |
   |                                                      v                             |
   +----(Cathode)-- [ D1: Flyback ] --(Anode)----> (Drain_Node) ----> [ Q1:Drain ]      |
                                                                            |           |
                                                                            +-----------+
                                                                            |
                                                                      (Internal FET)
                                                                            |
                                                                            v
                                                                      [ Q1:Source ]
                                                                            |
                                                                            v
                                                                           GND
Electrical Schematic

Electrical diagram

Electrical diagram for case: Vault lock with delay and power drive
Generated from the validated SPICE netlist for this case.

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Measurements and tests

Validate the circuit operation using a multimeter or oscilloscope:

  1. Logic Verification: Press SW1 only. Measure voltage at Gate_Node. It should be 0 V. Repeat for SW2 only. The load should remain OFF.
  2. Activation: Press SW1 and SW2 simultaneously. Measure voltage at Gate_Node. It should rise immediately to approx 12 V. The Solenoid (Load) should activate.
  3. Hold Time (Delay): Release both buttons simultaneously. Watch the load.
    • The voltage at Gate_Node will begin to drop.
    • The Solenoid should remain active.
    • Measure the time it takes for the load to turn off (typically when Gate voltage drops below the MOSFET Threshold, ~3-4 V). With 47 kΩ and 100µF, this should be roughly 3 to 5 seconds.
  4. Flyback Check: (Oscilloscope only) Monitor Drain_Node when the transistor turns off. You should not see a massive voltage spike above 12 V, confirming D1 is clamping the inductive kickback.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: Vault Lock with Delay and Power Drive
.width out=256

* --- Models ---
* Generic Switch Model for Push Buttons
.model SW_push SW(Vt=2.5 Ron=0.01 Roff=100Meg)

* Power MOSFET Model (Approximation of IRF540)
* N-Channel, Threshold ~4V, Low Rds(on)
.model IRF540 NMOS(Level=1 Vto=4.0 Kp=20 Lambda=0.001 Rd=0.05 Rs=0.05)

* Diode Model (1N4007)
.model D1N4007 D(Is=14.11n N=1.984 Rs=33.89m Ikf=100m Cjo=20p M=0.3333 Vj=0.75 Bv=1000 Ibv=10u)

* --- Main Power Supply ---
V1 12V 0 DC 12

* --- User Interface (Push Buttons) ---
* We simulate physical button presses using Pulse Voltage Sources controlling switches.
* Logic: To unlock, SW1 and SW2 must be pressed simultaneously (AND logic).
* ... (truncated in public view) ...

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* Practical case: Vault Lock with Delay and Power Drive
.width out=256

* --- Models ---
* Generic Switch Model for Push Buttons
.model SW_push SW(Vt=2.5 Ron=0.01 Roff=100Meg)

* Power MOSFET Model (Approximation of IRF540)
* N-Channel, Threshold ~4V, Low Rds(on)
.model IRF540 NMOS(Level=1 Vto=4.0 Kp=20 Lambda=0.001 Rd=0.05 Rs=0.05)

* Diode Model (1N4007)
.model D1N4007 D(Is=14.11n N=1.984 Rs=33.89m Ikf=100m Cjo=20p M=0.3333 Vj=0.75 Bv=1000 Ibv=10u)

* --- Main Power Supply ---
V1 12V 0 DC 12

* --- User Interface (Push Buttons) ---
* We simulate physical button presses using Pulse Voltage Sources controlling switches.
* Logic: To unlock, SW1 and SW2 must be pressed simultaneously (AND logic).
V_act1 Ctrl1 0 PULSE(0 5 1 1m 1m 3 10)
V_act2 Ctrl2 0 PULSE(0 5 2.5 1m 1m 3 10)

* --- Logic Stage (Series AND) ---
* SW1 connects 12V to Mid_Switch
S1 12V Mid_Switch Ctrl1 0 SW_push

* SW2 connects Mid_Switch to R1 Input
S2 Mid_Switch Pre_R1 Ctrl2 0 SW_push

* --- Timing Stage (RC Hold) ---
* R1: Current limiter for charging
R1 Pre_R1 Gate_Node 1k

* C1: Energy storage (Timing capacitor)
C1 Gate_Node 0 100u

* R2: Discharge timing resistor (Bleeder)
* Time Constant (Discharge) = 47k * 100u = 4.7 seconds
R2 Gate_Node 0 47k

* --- Power Stage ---
* Q1 renamed to M1 to match SPICE MOSFET syntax (requires M prefix for NMOS model).
* Pin order: Drain Gate Source Bulk. Bulk connected to Source (0).
M1 Drain_Node Gate_Node 0 0 IRF540

* --- Load (Solenoid Simulation) ---
* Modeled as Inductor L1 and Resistor R3 in series
L1 12V Solenoid_Mid 10mH
R3 Solenoid_Mid Drain_Node 10

* --- Protection ---
* D1: Flyback diode to suppress inductive spikes from L1 upon turn-off
* Connected Cathode to 12V, Anode to Drain
D1 Drain_Node 12V D1N4007

* --- Simulation Commands ---
.op
* Transient analysis: 10ms step for 10 seconds to capture full charge/discharge cycle
.tran 10m 10s

* --- Output ---
* Monitoring Control signals, Gate voltage (Timing), and Drain voltage (Output state)
.print tran V(Ctrl1) V(Ctrl2) V(Gate_Node) V(Drain_Node) I(L1)

.end

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)

Analysis: The simulation confirms the intended operation. When the control signals activate the series switches (AND logic), the gate node charges to ~11.7V, turning the MOSFET ON (Drain drops to ~0.13V, Current ~1.18A). After the input pulses cease, the gate voltage decays slowly via R2. Around 9 seconds into the simulation, the gate voltage drops near the threshold (4V), and the MOSFET turns off, returning the Drain voltage to 12V.
Show raw data table (1095 rows)
Index   time            v(ctrl1)        v(ctrl2)        v(gate_node)    v(drain_node)   l1#branch
0	0.000000e+00	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.199844e-11
1	1.000000e-04	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.204503e-11
2	2.000000e-04	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.196043e-11
3	4.000000e-04	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.204260e-11
4	8.000000e-04	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.204346e-11
5	1.600000e-03	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.201220e-11
6	3.200000e-03	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.199165e-11
7	6.400000e-03	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.202979e-11
8	1.280000e-02	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.202182e-11
9	2.280000e-02	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.199840e-11
10	3.280000e-02	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.200551e-11
11	4.280000e-02	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.199929e-11
12	5.280000e-02	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.200551e-11
13	6.280000e-02	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.199929e-11
14	7.280000e-02	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.200551e-11
15	8.280000e-02	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.199929e-11
16	9.280000e-02	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.200551e-11
17	1.028000e-01	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.199929e-11
18	1.128000e-01	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.200551e-11
19	1.228000e-01	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.199929e-11
20	1.328000e-01	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.200551e-11
21	1.428000e-01	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.199929e-11
22	1.528000e-01	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.200551e-11
23	1.628000e-01	0.000000e+00	0.000000e+00	2.819323e-03	1.200000e+01	1.199929e-11
... (1071 more rows) ...

Common mistakes and how to avoid them

  1. Omitting the Flyback Diode (D1):
    • Error: The MOSFET fails after a few cycles due to high voltage spikes from the solenoid.
    • Solution: Always place a diode in parallel with inductive loads, cathode to positive supply.
  2. Wrong Capacitor Polarity:
    • Error: C1 explodes or heats up; circuit acts as a short.
    • Solution: Ensure the negative stripe of the electrolytic capacitor connects to Ground (0).
  3. Gate Floating:
    • Error: If R2 is removed, the lock stays stuck «ON» indefinitely because the gate charge has nowhere to go.
    • Solution: Ensure R2 is connected between Gate and Ground to provide a discharge path.

Troubleshooting

  • Solenoid turns off instantly (No delay):
    • Cause: C1 is too small, damaged, or R2 is too low (e.g., 1 kΩ instead of 47 kΩ).
    • Fix: Check R2 value or increase C1 capacitance.
  • MOSFET gets very hot during the «OFF» transition:
    • Cause: Slow discharge causes the MOSFET to linger in the «linear region» (acting as a resistor) for too long.
    • Fix: This is expected in simple RC delay circuits. Ensure the MOSFET has a heatsink or switch to a Logic-based delay (Schmitt Trigger) for a sharper cutoff.
  • Circuit never activates:
    • Cause: SW1 and SW2 are not wired in series, or MOSFET pinout (G-D-S) is incorrect.
    • Fix: Verify continuity through the switches to the Gate pin.

Possible improvements and extensions

  1. Schmitt Trigger Snap-Action: Insert a Schmitt Trigger inverter (like CD40106) between the RC network and the MOSFET. This creates a clean, digital ON/OFF transition, preventing the MOSFET from heating up during the discharge phase.
  2. Emergency Reset: Add a «Panic» switch (Normally Closed) in parallel with the capacitor C1. Pressing it instantly shorts the capacitor, locking the vault immediately regardless of the remaining time.

More Practical Cases on Prometeo.blog

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Go to Amazon

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Quick Quiz

Question 1: What is the primary condition required to activate the load in this security circuit?




Question 2: Which component acts as the 'analog memory' to keep the lock open for a short duration?




Question 3: What is a real-world application mentioned for this type of dual-input security circuit?




Question 4: What is the function of the IRF540 (Q1) in this circuit?




Question 5: What happens to the load immediately after the buttons are released?




Question 6: Which component is generally responsible for limiting the current while the capacitor charges in this type of RC circuit?




Question 7: What is the specific role of the discharge resistor (e.g., R2) in the circuit?




Question 8: Based on the context, what type of capacitor is typically used for timing circuits requiring values like 100 µF?




Question 9: Why might an industrial press use a circuit logic similar to this project?




Question 10: What is the specified voltage source for the main power supply in the context provided?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

Follow me:


Practical case: The Undefined Logic Level Danger

The Undefined Logic Level Danger prototype (Maker Style)

Level: Basic. Analyzing the instability caused by improper voltage divider inputs on digital gates.

Objective and use case

In this practical case, you will build a circuit where the input to a digital inverter (NOT gate) is held at exactly 2.5 V using a symmetrical voltage divider. This creates a «forbidden» state for 5 V logic families.

  • Understanding Logic Thresholds: Learn why digital inputs need defined High and Low voltages, not just «something in the middle.»
  • Diagnosing Instability: Recognize symptoms of undefined states, such as oscillation or excessive heating.
  • Internal Transistor Behavior: Visualize what happens to the internal MOSFETs when the input voltage is in the «dead zone.»

Expected Outcome:
* Signal: The input voltage (Vin) measures exactly 2.5 V.
* Output: The Output LED may be dim, flickering, or stuck at an intermediate voltage (not fully 0 V or 5 V).
* Thermal: The 74HC04 chip may become slightly warm due to internal «shoot-through» current.

Target audience: Students dealing with sensor interfacing and logic levels.

Materials

  • V1: 5 V DC supply, function: Main power source
  • R1: 10 kΩ resistor, function: Top leg of voltage divider
  • R2: 10 kΩ resistor, function: Bottom leg of voltage divider
  • U1: 74HC04, function: Hex Inverter (NOT gate)
  • R3: 330 Ω resistor, function: LED current limiting
  • D1: Red LED, function: Logic state indicator
  • C1: 100 nF capacitor, function: Power supply decoupling

Pin-out of the IC used

Chip: 74HC04 (Hex Inverter)

Pin Name Logic Function Connection in this case
1 1 A Input Connected to Voltage Divider (2.5 V)
2 1Y Output Connected to LED resistor
7 GND Ground Connected to Power Supply Ground
14 VCC Power (+5 V) Connected to Power Supply +5 V

Wiring guide

  • VCC: Connect positive terminal of V1, Pin 14 of U1, and one side of R1.
  • 0 (GND): Connect negative terminal of V1, Pin 7 of U1, one side of R2, and the cathode (short leg) of D1.
  • V_IN: Connect the remaining side of R1, the remaining side of R2, and Pin 1 (Input 1 A) of U1. Note: This node creates the problematic 2.5 V level.
  • V_OUT: Connect Pin 2 (Output 1Y) of U1 to one side of R3.
  • LED_NODE: Connect the remaining side of R3 to the anode (long leg) of D1.
  • Decoupling: Connect C1 directly between Pin 14 and Pin 7 of U1.

Conceptual block diagram

Conceptual block diagram — 74HC04 Transistor
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

INPUT STAGE (Voltage Divider)              PROCESSING STAGE (Logic)                  OUTPUT STAGE (Load)

VCC (5 V)
   |
[ R1: 10 kΩ ]
   |
   +---------(V_IN: ~2.5 V)---------> [ U1: 74HC04 (Inverter) ] -------(V_OUT)-------> [ R3: 330 Ω ] ----> [ D1: LED ] ----> GND
   |          (Undefined Level)      [ Input: Pin 1          ]
[ R2: 10 kΩ ]                         [ Output: Pin 2         ]
   |                                 [ Power: VCC/GND + C1   ]
GND (0 V)
Electrical Schematic

Electrical diagram

Electrical diagram for case: The undefined logic level danger
Generated from the validated SPICE netlist for this case.

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Truth table

Gate: NOT (Inverter)

Input (A) Output (Y)
L (0 V) H (5 V)
H (5 V) L (0 V)
2.5 V Undefined / Unstable

Measurements and tests

  1. Input Voltage Check: Set your multimeter to DC Voltage. Place the red probe on node V_IN (Pin 1 of U1) and the black probe on GND. Verify the reading is approximately 2.5 V.
  2. Output Observation: Look at D1. It might be glowing dimly or flickering. This indicates the output is not driving a solid Logic High or Low.
  3. Output Voltage Check: Measure the voltage at V_OUT (Pin 2). It will likely not be 0 V or 5 V, but a value in between, or it may be oscillating (fluctuating reading).
  4. Touch Test (Caution): Carefully touch the top of the plastic package of the 74HC04. If the chip feels warmer than ambient temperature, it is drawing excess current.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: The Undefined Logic Level Danger
.width out=256

* --- Models ---
* Generic Red LED Model
.model LED_RED D(IS=1e-22 N=1.5 RS=10 BV=5 CJO=50p IBV=1u)

* Subcircuit for U1: 74HC04 Hex Inverter
* Pinout: 1=Input(A), 2=Output(Y), 7=GND, 14=VCC
* Implemented with a continuous sigmoid function to allow robust simulation 
* of the linear region (undefined state) without convergence issues.
.subckt 74HC04 1 2 7 14
B_INV 2 7 V = V(14,7) / (1 + exp(20 * (V(1,7) - 0.5*V(14,7))))
.ends

* --- Components ---

* V1: Main Power Supply
* Using PULSE to simulate power-on transient (0V to 5V)
V1 VCC 0 PULSE(0 5 1u 10u 10u 100m 200m)
* ... (truncated in public view) ...

Copy this content into a .cir file and run with ngspice.

🔒 Part of this section is premium. With the 7-day pass or the monthly membership you can access the full content (materials, wiring, detailed build, validation, troubleshooting, variants and checklist) and download the complete print-ready PDF pack.

* Practical case: The Undefined Logic Level Danger
.width out=256

* --- Models ---
* Generic Red LED Model
.model LED_RED D(IS=1e-22 N=1.5 RS=10 BV=5 CJO=50p IBV=1u)

* Subcircuit for U1: 74HC04 Hex Inverter
* Pinout: 1=Input(A), 2=Output(Y), 7=GND, 14=VCC
* Implemented with a continuous sigmoid function to allow robust simulation 
* of the linear region (undefined state) without convergence issues.
.subckt 74HC04 1 2 7 14
B_INV 2 7 V = V(14,7) / (1 + exp(20 * (V(1,7) - 0.5*V(14,7))))
.ends

* --- Components ---

* V1: Main Power Supply
* Using PULSE to simulate power-on transient (0V to 5V)
V1 VCC 0 PULSE(0 5 1u 10u 10u 100m 200m)

* R1: Top leg of voltage divider (10k)
R1 VCC V_IN 10k

* R2: Bottom leg of voltage divider (10k)
* This creates approx 2.5V at V_IN when VCC is 5V
R2 V_IN 0 10k

* U1: 74HC04 Hex Inverter
* Connections: Pin 1=V_IN, Pin 2=V_OUT, Pin 7=0(GND), Pin 14=VCC
XU1 V_IN V_OUT 0 VCC 74HC04

* C1: Decoupling capacitor (100nF)
C1 VCC 0 100n

* R3: LED current limiting resistor (330 Ohm)
R3 V_OUT LED_NODE 330

* D1: Red LED
D1 LED_NODE 0 LED_RED

* --- Analysis ---

* Transient analysis to capture power-up and settling
* Step size 1us, Stop time 500us
.tran 1u 500u

* Print directives for simulation logging
.print tran V(V_IN) V(V_OUT) V(LED_NODE) V(VCC)

* Operating point calculation
.op

.end

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)

Analysis: The simulation shows V_IN settling at exactly 2.5V (half of VCC). The inverter output V_OUT also settles at 2.5V, causing the LED node to sit at ~1.75V. This confirms the ‘undefined’ behavior where the output is neither clearly High nor Low.
Show raw data table (519 rows)
Index   time            v(v_in)         v(v_out)        v(led_node)     v(vcc)
0	0.000000e+00	0.000000e+00	0.000000e+00	-1.32954e-36	0.000000e+00
1	1.000000e-08	0.000000e+00	0.000000e+00	-8.37118e-37	0.000000e+00
2	2.000000e-08	0.000000e+00	0.000000e+00	-2.17031e-37	0.000000e+00
3	4.000000e-08	0.000000e+00	0.000000e+00	6.442019e-37	0.000000e+00
4	8.000000e-08	0.000000e+00	0.000000e+00	1.087387e-36	0.000000e+00
5	1.600000e-07	0.000000e+00	0.000000e+00	5.886649e-37	0.000000e+00
6	3.200000e-07	0.000000e+00	0.000000e+00	-7.16419e-38	0.000000e+00
7	6.400000e-07	0.000000e+00	0.000000e+00	-1.33719e-37	0.000000e+00
8	1.000000e-06	0.000000e+00	0.000000e+00	-1.75658e-38	0.000000e+00
9	1.005123e-06	1.280776e-03	1.280776e-03	3.255392e-04	2.561552e-03
10	1.015369e-06	3.842328e-03	3.842328e-03	1.418765e-03	7.684656e-03
11	1.035862e-06	8.965432e-03	8.965432e-03	5.258943e-03	1.793086e-02
12	1.070382e-06	1.759552e-02	1.759552e-02	1.345000e-02	3.519104e-02
13	1.105069e-06	2.626716e-02	2.626716e-02	2.210557e-02	5.253431e-02
14	1.174442e-06	4.361042e-02	4.361042e-02	3.941132e-02	8.722085e-02
15	1.313188e-06	7.829696e-02	7.829696e-02	7.402122e-02	1.565939e-01
16	1.590680e-06	1.476700e-01	1.476700e-01	1.432281e-01	2.953401e-01
17	2.145665e-06	2.864162e-01	2.864162e-01	2.815810e-01	5.728324e-01
18	3.145665e-06	5.364162e-01	5.364162e-01	5.305352e-01	1.072832e+00
19	4.145665e-06	7.864162e-01	7.864162e-01	7.789169e-01	1.572832e+00
20	5.145665e-06	1.036416e+00	1.036416e+00	1.027633e+00	2.072832e+00
21	6.145665e-06	1.286416e+00	1.286416e+00	1.276050e+00	2.572832e+00
22	7.145665e-06	1.536416e+00	1.536416e+00	1.521539e+00	3.072832e+00
23	8.145665e-06	1.786416e+00	1.786416e+00	1.662480e+00	3.572832e+00
... (495 more rows) ...

Common mistakes and how to avoid them

  1. Assuming 2.5 V is «High»: Many students think any voltage > 0 V is «High.» Check the datasheet for VIH (Voltage Input High) minimum requirements (usually ~3.5 V for 5 V HC logic).
  2. Using High Impedance Dividers: Using 10 kΩ/10 kΩ is fine for references, but noise can easily couple into this high impedance node, causing the gate to switch randomly.
  3. Ignoring Decoupling Capacitors: In this unstable state, the chip generates noise on the power rails. Omitting C1 makes the behavior even more erratic.

Troubleshooting

  • Symptom: The LED is dim or flickering rapidly.
    • Cause: The input is in the «linear region» or «forbidden zone.» The internal transistors are amplifying noise.
    • Fix: Adjust the input voltage to be clearly valid (e.g., tie Input to VCC or GND directly to test).
  • Symptom: The chip is getting hot, but the LED works.
    • Cause: Shoot-through current. Inside the chip, both the P-MOSFET and N-MOSFET of the input stage are partially conducting because 2.5 V biases both of them ON. This creates a short circuit from VCC to GND inside the silicon.
    • Fix: Never leave a CMOS input at an intermediate voltage.
  • Symptom: Voltage at V_IN is not exactly 2.5 V.
    • Cause: Resistor tolerance (e.g., 5% or 10% resistors) or multimeter loading.
    • Fix: Measure R1 and R2 values independently or verify with a precision multimeter.
🕵️ See Diagnosis and Solution (Click to reveal)

### Diagnosis and Solution

**1. The Problem (Symptom):** «The LED flickers, is dim, or the chip heats up. The input measures 2.5 V. Is that a 1 or a 0?»

**2. The Investigation:** You measure Vin and confirm it is 2.5 V. You consult the 74HC04 datasheet:
* VIL (Max Input Low) = 1.35 V
* VIH (Min Input High) = 3.15 V
* **Result:** You are in «No Man’s Land»! The voltage is higher than a Low, but lower than a High.

**3. The Revelation:** This demonstrates **Noise Margins** and Transistor Physics. At 2.5 V, both the internal Input PMOS and NMOS transistors are partially turned ON. This creates a direct path for current to flow from VCC to GND (Shoot-through), causing heat. The output becomes unpredictable and sensitive to even millivolts of noise.

**4. The Solution:** Modify the divider to deliver a safe logic level.
* **To send a ‘1’:** Change **R1 to 1 kΩ** (and keep R2 at 10k). Vout ≈ 4.5 V (Solid Logic High).
* **To send a ‘0’:** Change **R2 to 1 kΩ** (and keep R1 at 10k). Vout ≈ 0.45 V (Solid Logic Low).

Possible improvements and extensions

  1. Hysteresis implementation: Replace the 74HC04 with a 74HC14 (Schmitt Trigger Inverter). Observe how the Schmitt trigger handles the 2.5 V input (it will stay in the previous state until a specific threshold is crossed) without oscillating.
  2. Variable Input: Replace the fixed resistors R1/R2 with a 10 kΩ potentiometer. Sweep the voltage from 0 V to 5 V while measuring the supply current (Amperage). You will see a spike in current exactly around the 2.5 V transition point.

More Practical Cases on Prometeo.blog

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Quick Quiz

Question 1: What is the main objective of the practical case described in the article?




Question 2: What specific voltage is the input to the NOT gate held at in this experiment?




Question 3: Which specific chip is used as the digital inverter (NOT gate) in this circuit?




Question 4: What is the function of the resistors forming the voltage divider in this circuit?




Question 5: What is a likely symptom of the output LED when the input is in the 'forbidden' zone?




Question 6: Why might the 74HC04 chip become slightly warm during this experiment?




Question 7: What logic family concept is this experiment primarily trying to teach?




Question 8: In a standard 74HC04 pinout, which pin is typically an input (like 1 A) where the divider would connect?




Question 9: Although not explicitly detailed in the text, what is the standard function of a 100 nF capacitor (C1) in digital circuits like this?




Question 10: What happens to the internal MOSFETs when the input voltage is in the 'dead zone'?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

Follow me:


Practical case: NPN Switch Saturation Troubleshooting

NPN Switch Saturation Troubleshooting prototype (Maker Style)

Level: Basic. Learn to identify and fix an NPN transistor stuck in the active region.

Objective and use case

In this practical case, you will build a standard Low-Side Switch using a BJT (Bipolar Junction Transistor) to control a high-current load. However, the circuit will contain a deliberate flaw in the base resistor selection to demonstrate the difference between the Active Region and Saturation.

  • Understanding Transistor Modes: Learn why a transistor acts as a resistor instead of a switch if not biased correctly.
  • Power Dissipation: Understand why partially open transistors overheat.
  • Troubleshooting: Practice measuring VCE to diagnose switching efficiency.

Expected outcome:
* Initially, the high-current LED will be surprisingly dim.
* Voltage measurement across the transistor (VCE) will be high (> 2 V).
* After the fix, the LED will be bright, and VCE will drop to near 0 V.
* Target audience: Beginners and students familiar with basic Ohm’s Law.

Materials

  • V1: 5 V DC Power Supply, function: Main circuit power.
  • Q1: 2N2222 NPN Transistor, function: Low-side switch.
  • D1: High-Brightness White LED, function: The heavy load (requires approx. 80-100 mA).
  • R1: 33 Ω resistor (1/2 Watt), function: LED current limiting (Rload).
  • R2: 100 kΩ resistor, function: Incorrect Base resistor (Test Case).
  • R3: 1 kΩ resistor, function: Correct Base resistor (Solution).
  • S1: SPST Switch or Jumper wire, function: Input control.

Wiring guide

Construct the circuit using the following netlist connections. Pay attention to the node names.

  • V1 (5 V) connects to node VCC.
  • V1 (GND) connects to node 0.
  • S1 connects between VCC and node SWITCH_OUT.
  • R2 (100 kΩ) connects between SWITCH_OUT and node BASE.
  • Q1 Base connects to node BASE.
  • Q1 Emitter connects to node 0 (GND).
  • Q1 Collector connects to node COLLECTOR.
  • D1 Anode connects to node VCC.
  • D1 Cathode connects to node LED_CATHODE.
  • R1 (33 Ω) connects between LED_CATHODE and COLLECTOR.

Conceptual block diagram

Conceptual block diagram — NPN Switch (Saturation Test)
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

Title: Practical case: NPN Switch Saturation Troubleshooting

(1) CONTROL PATH (Base Current Drive)
    VCC --> [ S1: Switch ] --(SWITCH_OUT)--> [ R2: 100k ] --(BASE)--> [ Q1: Base ]
                                                                           |
                                                                    (Activates Switch)
                                                                           |
                                                                           V

(2) POWER PATH (High Current Load)
    VCC --> [ D1: LED ] --(LED_CATHODE)--> [ R1: 33 Ohm ] --(COLLECTOR)--> [ Q1: Collector ]
                                                                                 |
                                                                           (Current Flow)
                                                                                 |
                                                                                 V
                                                                           [ Q1: Emitter ] --> GND
Electrical Schematic

Electrical diagram

Electrical diagram for case: NPN switch saturation troubleshooting
Generated from the validated SPICE netlist for this case.

🔒 This electrical diagram is premium. With the 7-day pass or the monthly membership you can unlock the complete didactic material and the print-ready PDF pack.🔓 See premium access plans

Measurements and tests

Follow this procedure to analyze the circuit behavior before applying the fix.

  1. Visual Inspection: Close switch S1. Observe the brightness of D1. It should be noticeably dim for a high-brightness LED.
  2. Base Voltage Check: Measure voltage at node BASE relative to GND. It should be approximately 0.7 V.
  3. Collector Voltage (VCE) Check: Measure voltage at node COLLECTOR relative to GND (across the transistor).
    • Expectation for a perfect switch: ~0 V.
    • Actual measurement: You will likely measure a significant voltage (e.g., 2 V to 4 V depending on the exact gain of your specific Q1).
  4. Calculated Current: Calculate the current entering the base: IB = (5 V – 0.7 V) / 100 kΩ.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: NPN Switch Saturation Troubleshooting
.width out=256

* --- Power Supply ---
V1 VCC 0 DC 5

* --- Input Control (S1) ---
* S1 connects VCC to SWITCH_OUT. Modeled as a voltage-controlled switch
* driven by a PULSE source to simulate user actuation.
S1 VCC SWITCH_OUT CTRL 0 SW_IDEAL
Vctrl CTRL 0 PULSE(0 5 0 1u 1u 50u 100u)
.model SW_IDEAL SW(Vt=2.5 Ron=0.01 Roff=100Meg)

* --- Circuit Components ---
* R2: Incorrect Base resistor (100k) causing weak saturation.
* This matches the "Troubleshooting" state defined in the Wiring Guide.
R2 SWITCH_OUT BASE 100k

* Note: R3 (1k) is listed in the BOM as the 'Solution' but is not connected
* in the current wiring guide configuration. It is omitted to prevent floating nodes.
* ... (truncated in public view) ...

Copy this content into a .cir file and run with ngspice.

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* Practical case: NPN Switch Saturation Troubleshooting
.width out=256

* --- Power Supply ---
V1 VCC 0 DC 5

* --- Input Control (S1) ---
* S1 connects VCC to SWITCH_OUT. Modeled as a voltage-controlled switch
* driven by a PULSE source to simulate user actuation.
S1 VCC SWITCH_OUT CTRL 0 SW_IDEAL
Vctrl CTRL 0 PULSE(0 5 0 1u 1u 50u 100u)
.model SW_IDEAL SW(Vt=2.5 Ron=0.01 Roff=100Meg)

* --- Circuit Components ---
* R2: Incorrect Base resistor (100k) causing weak saturation.
* This matches the "Troubleshooting" state defined in the Wiring Guide.
R2 SWITCH_OUT BASE 100k

* Note: R3 (1k) is listed in the BOM as the 'Solution' but is not connected
* in the current wiring guide configuration. It is omitted to prevent floating nodes.

* Q1: NPN Transistor Switch (Low-side)
Q1 COLLECTOR BASE 0 2N2222MOD

* D1: High-Brightness White LED
D1 VCC LED_CATHODE D_WHITE

* R1: LED Current Limiting Resistor
R1 LED_CATHODE COLLECTOR 33

* --- Models ---
* Generic NPN Model for 2N2222
.model 2N2222MOD NPN(IS=1E-14 BF=200 VAF=100 IKF=0.3 RB=10 RC=0.3 RE=0.2 CJE=25p CJC=8p)

* Approximate White LED Model (High Forward Voltage)
.model D_WHITE D(IS=1p N=3.5 RS=5 BV=5 IBV=10u)

* --- Analysis Commands ---
* Transient analysis to visualize switching behavior
.tran 1u 200u

* Output identification:
* Input: V(SWITCH_OUT)
* Output: V(COLLECTOR) (Low-side switch voltage)
.print tran V(SWITCH_OUT) V(COLLECTOR) V(BASE) V(LED_CATHODE)

.end

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)

Analysis: The simulation confirms the ‘Troubleshooting’ scenario: when the switch is ON (V(SWITCH_OUT)=5V), the Collector voltage drops only to ~2.6V rather than near 0V. This indicates the transistor is in the active region (not fully saturated) due to the high base resistance (100kΩ), failing to fully power the LED load.
Show raw data table (271 rows)
Index   time            v(switch_out)   v(collector)    v(base)         v(led_cathode)
0	0.000000e+00	5.375300e-01	3.548129e+00	5.330675e-01	3.548432e+00
1	1.000000e-08	5.375300e-01	3.548129e+00	5.330675e-01	3.548432e+00
2	2.000000e-08	5.375300e-01	3.548129e+00	5.330675e-01	3.548432e+00
3	4.000000e-08	5.375300e-01	3.548129e+00	5.330676e-01	3.548432e+00
4	8.000000e-08	5.375300e-01	3.548129e+00	5.330676e-01	3.548432e+00
5	1.600000e-07	5.375300e-01	3.548129e+00	5.330676e-01	3.548432e+00
6	3.200000e-07	5.375300e-01	3.548129e+00	5.330676e-01	3.548432e+00
7	3.562500e-07	5.375300e-01	3.548129e+00	5.330676e-01	3.548432e+00
8	4.196875e-07	5.375300e-01	3.548129e+00	5.330676e-01	3.548432e+00
9	4.372461e-07	5.375300e-01	3.548129e+00	5.330676e-01	3.548432e+00
10	4.679736e-07	5.375300e-01	3.548129e+00	5.330676e-01	3.548432e+00
11	5.019934e-07	5.000000e+00	3.537721e+00	5.508590e-01	3.538060e+00
12	5.700330e-07	5.000000e+00	3.337558e+00	5.996484e-01	3.340559e+00
13	6.907446e-07	5.000000e+00	3.004466e+00	6.704095e-01	3.063080e+00
14	8.252066e-07	5.000000e+00	2.710645e+00	7.051011e-01	2.922994e+00
15	1.000000e-06	5.000000e+00	2.604154e+00	7.130054e-01	2.886751e+00
16	1.026892e-06	5.000000e+00	2.605141e+00	7.129945e-01	2.887005e+00
17	1.080677e-06	5.000000e+00	2.606105e+00	7.129106e-01	2.887380e+00
18	1.188247e-06	5.000000e+00	2.607032e+00	7.128469e-01	2.887677e+00
19	1.403386e-06	5.000000e+00	2.607269e+00	7.128312e-01	2.887753e+00
20	1.833664e-06	5.000000e+00	2.607219e+00	7.128340e-01	2.887737e+00
21	2.694221e-06	5.000000e+00	2.607248e+00	7.128325e-01	2.887747e+00
22	3.694221e-06	5.000000e+00	2.607227e+00	7.128335e-01	2.887740e+00
23	4.694221e-06	5.000000e+00	2.607243e+00	7.128328e-01	2.887745e+00
... (247 more rows) ...

Common mistakes and how to avoid them

  1. Confusing Pinout: Placing the transistor backwards (Collector and Emitter swapped) often allows some current to flow but with very low gain, mimicking this specific problem. Always verify the datasheet.
  2. Assuming hFE is Constant: Students often use the maximum hFE (e.g., 300) for calculation. For switching, you must assume a much lower «forced beta» (usually 10) to ensure saturation.
  3. Ignoring Power Ratings: If the transistor is dropping 3 V and passing 50 mA, it is dissipating 150mW. While safe for a 2N2222, this heat is wasted energy.

Troubleshooting

  • LED does not light up at all: Check if the LED polarity is correct (Anode to VCC). Verify S1 is actually connecting power to R2.
  • Transistor gets hot: If VCE is high and current is flowing, the transistor is acting as a resistor. This confirms it is in the Active Region.
  • VCE reads 5 V: The transistor is not turning on at all. Check if R2 is connected properly or if the Base-Emitter junction is blown.

Diagnosis and Solution

Follow this pedagogical sequence to understand and resolve the issue.

1. The Problem (Symptom)
You have assembled the circuit, closed the switch, but the High-Current LED barely glows. It looks weak. Why is this happening if the transistor is supposed to be a «switch»?

2. The Investigation
Take your multimeter. Measure the voltage between the Collector and Emitter (VCE).
* If Q1 were a closed switch, you would expect 0 V (or very close to it).
* However, you will likely find 2 V to 3 V.
* Now, calculate the Base Current you are providing: IB = (VIN – 0.7 V) / RB. With 100 kΩ, IB is tiny (~43µ A).

🕵️ See Diagnosis and Solution (Click to reveal)

**3. The Revelation**
The transistor does not have enough base current to fully open the «valve».
* To act as a switch, the transistor must be in **Saturation**.
* Currently, it is in the **Active (Linear) Region**.
* The condition IB × hFE < Icload is occurring. The transistor is limiting the current and acting like a variable resistor, dropping voltage and wasting power. **4. The Solution** You must force the transistor into saturation. 1. **Recalculate RB:** We generally use a "Forced Beta" of 10 for switching. Target IB = Iload / 10. 2. **The Fix:** Remove the 100 kΩ resistor (R2) and replace it with the **1 kΩ resistor (R3)**. 3. **Verify:** Turn the switch on. The LED should shine brightly. Measure VCE again; it should now be **< 0.2 V** (Saturation Voltage).

Possible improvements and extensions

  1. Darlington Pair: Use two transistors configured as a Darlington pair to increase the total gain, allowing the 100 kΩ resistor to successfully switch the load (at the cost of a higher Vcesat drop of ~1.2 V).
  2. MOSFET Upgrade: Replace the 2N2222 with an N-Channel MOSFET (like a 2N7000) to achieve near-zero gate current requirements and lower voltage drop.

More Practical Cases on Prometeo.blog

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Quick Quiz

Question 1: What is the primary learning objective of this practical case?




Question 2: Which component is specified to act as the low-side switch in this circuit?




Question 3: What is the purpose of the initial 100 kΩ resistor (R2) in this experiment?




Question 4: How does a transistor behave when it is stuck in the active region due to incorrect biasing?




Question 5: What is the expected initial observation of the LED before the circuit is fixed?




Question 6: What happens to the transistor regarding power dissipation if it is partially open (not fully saturated)?




Question 7: Which V_CE measurement indicates that the transistor is not switching efficiently?




Question 8: Which resistor value is likely the 'Correct' base resistor to ensure saturation (based on standard practice for this context)?




Question 9: After fixing the circuit to achieve saturation, what should the V_CE measurement be?




Question 10: According to the wiring guide, where should the V1 (GND) connection be made?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

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Practical case: High power circuit isolation

High power circuit isolation prototype (Maker Style)

Level: Basic – Control a high-power load using a low-voltage signal via galvanic isolation.

Objective and use case

You will build a driver circuit that uses a small 5 V signal to activate an electromechanical relay, which in turn switches a separate 12 V high-power circuit powering a bulb.

  • Why it is useful:

    • Automotive Systems: Allows a low-current ECU signal to switch high-current headlights.
    • Safety: Keeps high voltage/current (the load side) physically separated from the sensitive control logic (the user side).
    • Interface: Enables microcontrollers (like Arduino/ESP32) to control industrial equipment or AC appliances (simulated here with 12 V).
  • Expected outcome:

    • The 12 V bulb turns ON only when the 5 V control switch is closed.
    • An audible «click» is heard from the relay component when switching states.
    • Measurements: 0 V on the load when the control signal is 0 V; ~12 V on the load when the control signal is 5 V.
  • Target audience: Students dealing with electromechanical interfaces and circuit protection.

Materials

  • V1: 5 V DC voltage source, function: Control Logic Supply
  • V2: 12 V DC voltage source, function: High Power Load Supply
  • S1: SPST Toggle Switch, function: Control trigger
  • R1: 1 kΩ resistor, function: Base current limiter for Q1
  • Q1: 2N2222 NPN BJT Transistor, function: Relay coil driver
  • D1: 1N4007 Diode, function: Flyback protection (snubber)
  • K1: 5 V SPST Relay (coil resistance ~70 Ω), function: Galvanic isolation switch
  • L1: 12 V / 10 W Incandescent Bulb, function: High power load

Wiring guide

This guide uses specific node names to ensure correct connections in simulation and assembly. The circuit has two isolated sides: the Control Side (Nodes: V_CTRL, 0) and the Load Side (Nodes: V_HV, GND_LOAD).

Control Side (Low Power):
* V1 (+): Connects to Node V_CTRL.
* V1 (-): Connects to Node 0 (Common Ground).
* S1: Connects between V_CTRL and Node V_TRIG.
* R1: Connects between V_TRIG and Node V_BASE.
* Q1 (Base): Connects to Node V_BASE.
* Q1 (Emitter): Connects to Node 0.
* Q1 (Collector): Connects to Node COIL_LOW.
* K1 (Coil pin 1): Connects to Node V_CTRL.
* K1 (Coil pin 2): Connects to Node COIL_LOW.
* D1 (Anode): Connects to Node COIL_LOW.
* D1 (Cathode): Connects to Node V_CTRL (Reverse biased across coil).

Load Side (High Power):
* V2 (+): Connects to Node V_HV.
* V2 (-): Connects to Node GND_LOAD (Isolated from Node 0).
* K1 (Common Contact): Connects to Node V_HV.
* K1 (Normally Open Contact): Connects to Node BULB_IN.
* L1: Connects between Node BULB_IN and Node GND_LOAD.

Conceptual block diagram

Conceptual block diagram — Galvanic Isolation Control
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

+-------------------------------------------------------------------------+
|               PRACTICAL CASE: HIGH POWER CIRCUIT ISOLATION              |
+-------------------------------------------------------------------------+

===========================================================================
  PART 1: CONTROL SIDE (5 V Logic)
  Nodes: V_CTRL, V_TRIG, V_BASE, COIL_LOW, 0 (GND)
===========================================================================

  (Trigger Signal Path)
  [ V1: 5 V (+) ] --> [ S1: Switch ] --> [ R1: 1k Ohm ] --> [ Q1: Base ]
                                                               |
                                                               | (Controls)
                                                               v
  (Coil Power Path)                                    [ Q1: Collector ]
  [ V1: 5 V (+) ] ---------> [ K1: Relay Coil ] --------------> |
                            [ || D1 Diode    ]                 |
                            [ (Rev Biased)   ]                 | (Conducts to)
                                                               |
                                                               v
                                                       [ Q1: Emitter ]
                                                               |
                                                               v
                                                       [ Node 0 (GND) ]


             ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~
             ~      MAGNETIC LINK (GALVANIC ISOLATION)   ~
             ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~


===========================================================================
  PART 2: LOAD SIDE (12 V High Power)
  Nodes: V_HV, BULB_IN, GND_LOAD
===========================================================================

  (High Current Path)

  [ V2: 12 V (+) ] --> [ K1: Relay Switch ] --> [ L1: 12 V Bulb ] --> [ GND_LOAD ]
                      [   (COM -> NO)    ]
Electrical Schematic

Electrical diagram

Electrical diagram for case: High power circuit isolation
Generated from the validated SPICE netlist for this case.

🔒 This electrical diagram is premium. With the 7-day pass or the monthly membership you can unlock the complete didactic material and the print-ready PDF pack.🔓 See premium access plans

Measurements and tests

Follow these steps to validate the isolation and switching capability:

  1. Coil Voltage Test:

    • Close switch S1.
    • Measure voltage between V_CTRL and COIL_LOW.
    • Result: It should read approximately 5 V (indicating the transistor is sinking current).
  2. Load Activation:

    • Keep S1 closed.
    • Observe L1 (Bulb).
    • Result: The bulb illuminates. Measure voltage across L1; it should be ~12 V.
  3. Switch Latency (Oscilloscope required):

    • Connect Channel 1 to V_TRIG and Channel 2 to BULB_IN.
    • Toggle S1 from OFF to ON.
    • Result: You will observe a delay (typically 5–15 ms) between the signal rising on Ch1 and power appearing on Ch2. This is the mechanical switching time of the relay armature.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* High power circuit isolation
*
* This netlist simulates a relay driver circuit with a high-power load.
* It includes a low-voltage control side (5V) and an isolated high-voltage load side (12V).
*

* --- Analysis Setup ---
.tran 10u 10m
.print tran V(V_TRIG) V(BULB_IN) V(COIL_LOW) I(L_K1_COIL)

* --- Control Side (Low Power) ---

* Supply V1: 5V DC
V1 V_CTRL 0 DC 5

* Switch S1: Modeled as a Pulse Voltage Source to simulate user actuation
* Connects to V_TRIG to drive the base resistor.
* Timing: Off for 1ms, On for 4ms, then Off.
V_S1 V_TRIG 0 PULSE(0 5 1m 10u 10u 4m 10m)

* ... (truncated in public view) ...

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* High power circuit isolation
*
* This netlist simulates a relay driver circuit with a high-power load.
* It includes a low-voltage control side (5V) and an isolated high-voltage load side (12V).
*

* --- Analysis Setup ---
.tran 10u 10m
.print tran V(V_TRIG) V(BULB_IN) V(COIL_LOW) I(L_K1_COIL)

* --- Control Side (Low Power) ---

* Supply V1: 5V DC
V1 V_CTRL 0 DC 5

* Switch S1: Modeled as a Pulse Voltage Source to simulate user actuation
* Connects to V_TRIG to drive the base resistor.
* Timing: Off for 1ms, On for 4ms, then Off.
V_S1 V_TRIG 0 PULSE(0 5 1m 10u 10u 4m 10m)

* Resistor R1: 1k Base Current Limiter
R1 V_TRIG V_BASE 1k

* Transistor Q1: 2N2222 NPN Relay Driver
* Connections: Collector=COIL_LOW, Base=V_BASE, Emitter=0
Q1 COIL_LOW V_BASE 0 2N2222MOD

* Relay Coil K1 (Coil Side)
* Modeled as Inductance + Resistance in series between V_CTRL and COIL_LOW
R_K1_COIL V_CTRL INT_COIL 70
L_K1_COIL INT_COIL COIL_LOW 50m

* Diode D1: Flyback protection (Snubber)
* Anode=COIL_LOW, Cathode=V_CTRL
D1 COIL_LOW V_CTRL 1N4007MOD

* --- Load Side (High Power) ---

* Ground Isolation: High resistance path to global ground 0 to prevent singular matrix
R_ISO GND_LOAD 0 100Meg

* Supply V2: 12V DC
V2 V_HV GND_LOAD DC 12

* Relay Contact K1 (Switch Side)
* Modeled as a Voltage Controlled Switch
* Controlled by the voltage across the coil: V(V_CTRL) - V(COIL_LOW)
* Connects V_HV to BULB_IN when coil is energized
S_K1 V_HV BULB_IN V_CTRL COIL_LOW RELAY_SW_MOD

* Load L1: 12V / 10W Bulb
* Resistance ~ 14.4 Ohms (R = V^2 / P = 144 / 10)
R_L1 BULB_IN GND_LOAD 14.4

* --- Component Models ---

* NPN Transistor Model
.model 2N2222MOD NPN(IS=1E-14 VAF=100 BF=200 IKF=0.3 XTB=1.5 BR=3 CJC=8E-12 CJE=25E-12 TR=46.91E-9 TF=411.1E-12 ITF=0.6 VTF=1.7 XTF=3 RB=10 RC=0.3 RE=0.2)

* Diode Model
.model 1N4007MOD D(IS=7.02767n RS=0.0341512 N=1.80803 EG=1.11 XTI=3 BV=1000 IBV=5u CJO=10p VJ=0.7 M=0.5 FC=0.5 TT=100n)

* Relay Switch Model
* Threshold Vt=2.5V (Coil is 5V), Hysteresis Vh=0.5V
.model RELAY_SW_MOD SW(Vt=2.5 Vh=0.5 Ron=0.1 Roff=100Meg)

.op
.end

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)

Analysis: The simulation shows the trigger signal (V_TRIG) going high (5V) between 1ms and 5ms. During this window, the coil current (I(L_K1_COIL)) rises, causing the relay switch to close and V(BULB_IN) to switch to ~12V. After 5ms, the trigger drops, coil current decays (snubber active), and the load voltage returns to near zero.
Show raw data table (4100 rows)
Index   time            v(v_trig)       v(bulb_in)      v(coil_low)     l_k1_coil#branc
0	0.000000e+00	0.000000e+00	1.722670e-06	5.000000e+00	1.002664e-11
1	1.000000e-07	0.000000e+00	1.722670e-06	5.000000e+00	1.002626e-11
2	2.000000e-07	0.000000e+00	1.722670e-06	5.000000e+00	1.002547e-11
3	4.000000e-07	0.000000e+00	1.722670e-06	5.000000e+00	1.002342e-11
4	8.000000e-07	0.000000e+00	1.722670e-06	5.000000e+00	1.001814e-11
5	1.600000e-06	0.000000e+00	1.722670e-06	5.000000e+00	1.000316e-11
6	3.200000e-06	0.000000e+00	1.722670e-06	5.000000e+00	9.969744e-12
7	6.400000e-06	0.000000e+00	1.722670e-06	5.000000e+00	1.000801e-11
8	1.280000e-05	0.000000e+00	1.722670e-06	5.000000e+00	1.002921e-11
9	2.280000e-05	0.000000e+00	1.722670e-06	5.000000e+00	9.970357e-12
10	3.280000e-05	0.000000e+00	1.722670e-06	5.000000e+00	1.004993e-11
11	4.280000e-05	0.000000e+00	1.722670e-06	5.000000e+00	9.955463e-12
12	5.280000e-05	0.000000e+00	1.722670e-06	5.000000e+00	1.004077e-11
13	6.280000e-05	0.000000e+00	1.722670e-06	5.000000e+00	9.984500e-12
14	7.280000e-05	0.000000e+00	1.722670e-06	5.000000e+00	1.001134e-11
15	8.280000e-05	0.000000e+00	1.722670e-06	5.000000e+00	1.001578e-11
16	9.280000e-05	0.000000e+00	1.722670e-06	5.000000e+00	1.000519e-11
17	1.028000e-04	0.000000e+00	1.722670e-06	5.000000e+00	1.003686e-11
18	1.128000e-04	0.000000e+00	1.722670e-06	5.000000e+00	9.961732e-12
19	1.228000e-04	0.000000e+00	1.722670e-06	5.000000e+00	1.005266e-11
20	1.328000e-04	0.000000e+00	1.722670e-06	5.000000e+00	9.963169e-12
21	1.428000e-04	0.000000e+00	1.722670e-06	5.000000e+00	1.003205e-11
22	1.528000e-04	0.000000e+00	1.722670e-06	5.000000e+00	9.984436e-12
23	1.628000e-04	0.000000e+00	1.722670e-06	5.000000e+00	1.001919e-11
... (4076 more rows) ...

Common mistakes and how to avoid them

  1. Omitting the flyback diode (D1):

    • Error: The transistor Q1 fails permanently after a few switches.
    • Solution: Always place a diode in reverse bias parallel to the relay coil to absorb the high-voltage spike generated when the magnetic field collapses.
  2. Sharing Grounds unintentionally:

    • Error: Connecting GND_LOAD to Node 0 on the breadboard.
    • Solution: While the circuit will work, you lose galvanic isolation. Keep the high-power return path physically separate from the logic ground.
  3. Insufficient Base Current:

    • Error: Using a resistor R1 that is too high (e.g., 100 kΩ). The relay does not click or clicks weakly.
    • Solution: Ensure the transistor is in saturation. For a 2N2222 driving a standard relay, 1 kΩ is usually sufficient.

Troubleshooting

  • Symptom: Relay clicks, but the bulb does not light up.

    • Cause: Issue on the Load Side (Secondary circuit).
    • Fix: Check V2 supply, verify the bulb L1 is not burnt, and ensure connections to the Relay COM/NO pins are tight.
  • Symptom: No sound from relay, Bulb OFF.

    • Cause: The coil is not energizing.
    • Fix: Check voltage at Node V_BASE. If 0 V, check S1. If ~0.7 V, check if Q1 is installed correctly (E-B-C pinout).
  • Symptom: Transistor gets extremely hot.

    • Cause: Coil current is too high for the selected transistor.
    • Fix: Verify the relay coil resistance. If it draws >600 mA, the 2N2222 might be underpowered; use a power transistor (e.g., TIP31) or a MOSFET.

Possible improvements and extensions

  1. Status Indicator: Add a small LED and a 330 Ω resistor in parallel with the Relay Coil to visually indicate when the control signal is active.
  2. Solid State Upgrade: Replace the mechanical relay (K1) and transistor driver with an Optocoupler and a MOSFET (or Triac for AC) to eliminate mechanical wear and reduce switching latency.

More Practical Cases on Prometeo.blog

Find this product and/or books on this topic on Amazon

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As an Amazon Associate, I earn from qualifying purchases. If you buy through this link, you help keep this project running.

Quick Quiz

Question 1: What is the primary function of the electromechanical relay in this circuit?




Question 2: Which component is typically responsible for driving the relay coil in this type of driver circuit?




Question 3: What is the purpose of the flyback diode (D1) placed across the relay coil?




Question 4: What voltage is specified for the Control Logic Supply (V1)?




Question 5: What physical indication is expected from the relay component when it switches states?




Question 6: Why is this relay circuit useful in automotive systems?




Question 7: What is the function of the base resistor (R1) connected to the transistor?




Question 8: What voltage measurement is expected on the load when the control signal is 0 V?




Question 9: Which component represents the high-power load in this specific circuit?




Question 10: What is the main safety benefit of using a relay for galvanic isolation?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

Follow me:


Practical case: DC Motor Reversing

DC Motor Reversing prototype (Maker Style)

Level: Basic – Understand how to use two SPDT relays to change polarity and direction of a DC motor.

Objective and use case

In this case, you will build a relay-based H-bridge circuit to control a DC motor. By using two Single Pole Double Throw (SPDT) relays, you will be able to drive the motor clockwise, counter-clockwise, or brake it using simple pushbuttons.

  • Real-world scenarios:
  • Automotive Power Windows: Reversing the motor to raise or lower the glass.
  • Robotics: Controlling wheel direction for forward and backward movement.
  • Industrial Conveyors: Changing the direction of a belt to route products.
  • Motorized Curtains: Opening and closing mechanisms.

  • Expected outcome:

  • Idle State: When no buttons are pressed, the motor terminals are grounded (0 V difference), resulting in a dynamic brake (motor stops).
  • Forward State: Pressing Button A applies +5 V to the motor; it spins Clockwise (CW).
  • Reverse State: Pressing Button B applies -5 V (polarity swap) to the motor; it spins Counter-Clockwise (CCW).
  • Braking/Safety: If both buttons are pressed simultaneously, both motor terminals connect to VCC, resulting in 0 V difference and the motor remains stopped.

Target audience: Hobbyists and students getting started with electromechanical control.

Materials

  • V1: 5 V DC Power Supply, function: Main energy source.
  • M1: 5 V DC Motor, function: The actuator to be controlled.
  • K1: 5 V SPDT Relay, function: Controls the «Positive» side of the motor.
  • K2: 5 V SPDT Relay, function: Controls the «Negative» side of the motor.
  • S1: Momentary Pushbutton (NO), function: Activates Relay K1 (Forward).
  • S2: Momentary Pushbutton (NO), function: Activates Relay K2 (Reverse).
  • D1: 1N4007 Diode, function: Flyback protection for K1 coil.
  • D2: 1N4007 Diode, function: Flyback protection for K2 coil.

Wiring guide

This guide uses node names to describe connections.
Nodes: VCC (5 V Supply), 0 (Ground), COIL_A, COIL_B, MOT_A, MOT_B.

  • Power Supply:
  • V1 (+): Connects to node VCC.
  • V1 (-): Connects to node 0.

  • Control Circuit (Coils):

  • S1: Connects between VCC and COIL_A.
  • K1 (Coil): Connects between COIL_A and 0.
  • D1: Cathode to COIL_A, Anode to 0 (Protects against inductive spikes).
  • S2: Connects between VCC and COIL_B.
  • K2 (Coil): Connects between COIL_B and 0.
  • D2: Cathode to COIL_B, Anode to 0.

  • Power Circuit (Motor Drive):

  • K1 (Normally Open – NO): Connects to VCC.
  • K1 (Normally Closed – NC): Connects to 0.
  • K1 (Common – COM): Connects to node MOT_A.
  • K2 (Normally Open – NO): Connects to VCC.
  • K2 (Normally Closed – NC): Connects to 0.
  • K2 (Common – COM): Connects to node MOT_B.
  • M1: Connects between MOT_A and MOT_B.

Conceptual block diagram

Conceptual block diagram — Relay H-Bridge Motor Control
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

+-------------------------------------------------------------------------+
|                DC MOTOR REVERSING CIRCUIT (H-BRIDGE)                    |
+-------------------------------------------------------------------------+

[ CONTROL SUBSYSTEM ]                                [ POWER SUBSYSTEM ]

      (Forward Input)                                   (Left Side Drive)
VCC --> [ S1 Button ]                                  VCC (NO)
            |                                             |
            v                                             v
    [ Node: COIL_A ]                               [ K1 Switch (COM) ] --(MOT_A)--+
            |                                      [  (Relay 1)      ]            |
            +--> [ K1 Coil || D1 ] --> GND                ^                       |
            |    (D1 is Reverse Biased)                   |                       |
            |                                             |                       |
            +----------(Magnetic Link)--------------------+                       |
                                                          |                       |
                                                  GND (NC) +                      |
                                                                                  v
                                                                           [ DC MOTOR ]
                                                                           [    M1    ]
                                                                                  ^
                                                  GND (NC) +                      |
                                                          |                       |
            +----------(Magnetic Link)--------------------+                       |
            |                                             |                       |
            |    (D2 is Reverse Biased)                   |                       |
            +--> [ K2 Coil || D2 ] --> GND         [ K2 Switch (COM) ] --(MOT_B)--+
            |                                      [  (Relay 2)      ]
    [ Node: COIL_B ]                                      ^
            ^                                             |
            |                                             |
VCC --> [ S2 Button ]                                  VCC (NO)
      (Reverse Input)                                   (Right Side Drive)

+-------------------------------------------------------------------------+
| LOGIC KEY:                                                              |
| 1. Idle: Both Switches connect COM to NC (GND). Motor is braked (0 V).   |
| 2. Press S1: K1 switches to NO (VCC). Current: VCC->MOT_A->MOT_B->GND.  |
| 3. Press S2: K2 switches to NO (VCC). Current: VCC->MOT_B->MOT_A->GND.  |
+-------------------------------------------------------------------------+
Electrical Schematic

Electrical diagram

Electrical diagram for case: DC motor reversing
Generated from the validated SPICE netlist for this case.

🔒 This electrical diagram is premium. With the 7-day pass or the monthly membership you can unlock the complete didactic material and the print-ready PDF pack.🔓 See premium access plans

Measurements and tests

To validate the circuit, perform the following steps using a multimeter and visual inspection:

  1. Idle Check: Ensure neither S1 nor S2 is pressed. Measure voltage between MOT_A and MOT_B.
    • Result: Should be 0 V. Both terminals are connected to GND via the NC contacts. The motor is locked (hard to turn by hand due to back EMF shorting).
  2. Forward Actuation: Press and hold S1.
    • Result: K1 clicks. Measure voltage from MOT_A (Red probe) to MOT_B (Black probe). Voltage should be approximately +5 V. Motor spins Clockwise.
  3. Reverse Actuation: Release S1, then press and hold S2.
    • Result: K2 clicks. Measure voltage from MOT_A to MOT_B. Voltage should be approximately -5 V. Motor spins Counter-Clockwise.
  4. Double Press (Safety Test): Press both S1 and S2 simultaneously.
    • Result: Both relays click. Voltage between MOT_A and MOT_B is 0 V (Both at 5 V potential). Motor does not move.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: DC Motor Reversing
.width out=256
* Ngspice Netlist
*
* Description: H-Bridge configuration using two SPDT relays to control a DC motor.
* Logic:
* - S1 Pressed -> K1 Active -> MOT_A = 5V, MOT_B = 0V (Forward)
* - S2 Pressed -> K2 Active -> MOT_A = 0V, MOT_B = 5V (Reverse)
* - None Pressed -> MOT_A = 0V, MOT_B = 0V (Stop/Brake)
*
* Simulation Time: 10ms (Captures S1 pulse at 1ms and S2 pulse at 5ms)
.tran 10u 10m

* -----------------------------------------------------------------------------
* Power Supply
* -----------------------------------------------------------------------------
* V1: 5V DC Power Supply, function: Main energy source.
* Connected between VCC (+) and 0 (-).
V1 VCC 0 DC 5

* ... (truncated in public view) ...

Copy this content into a .cir file and run with ngspice.

🔒 Part of this section is premium. With the 7-day pass or the monthly membership you can access the full content (materials, wiring, detailed build, validation, troubleshooting, variants and checklist) and download the complete print-ready PDF pack.

* Practical case: DC Motor Reversing
.width out=256
* Ngspice Netlist
*
* Description: H-Bridge configuration using two SPDT relays to control a DC motor.
* Logic:
* - S1 Pressed -> K1 Active -> MOT_A = 5V, MOT_B = 0V (Forward)
* - S2 Pressed -> K2 Active -> MOT_A = 0V, MOT_B = 5V (Reverse)
* - None Pressed -> MOT_A = 0V, MOT_B = 0V (Stop/Brake)
*
* Simulation Time: 10ms (Captures S1 pulse at 1ms and S2 pulse at 5ms)
.tran 10u 10m

* -----------------------------------------------------------------------------
* Power Supply
* -----------------------------------------------------------------------------
* V1: 5V DC Power Supply, function: Main energy source.
* Connected between VCC (+) and 0 (-).
V1 VCC 0 DC 5

* -----------------------------------------------------------------------------
* User Inputs (Pushbuttons)
* -----------------------------------------------------------------------------
* Modeled as Voltage Controlled Switches (S1, S2) driven by Pulse Sources.
* This strictly simulates the user pressing the button at specific times.

* Stimulus for S1 (Forward Request)
* Pulse: 0V to 5V, starts at 1ms, duration 2ms.
V_USER_S1 CTRL_S1 0 PULSE(0 5 1m 1u 1u 2m 10m)

* Stimulus for S2 (Reverse Request)
* Pulse: 0V to 5V, starts at 5ms, duration 2ms.
V_USER_S2 CTRL_S2 0 PULSE(0 5 5m 1u 1u 2m 10m)

* S1: Momentary Pushbutton (NO)
* Connects VCC to COIL_A when activated by V_USER_S1.
S1 VCC COIL_A CTRL_S1 0 SW_PUSH

* S2: Momentary Pushbutton (NO)
* Connects VCC to COIL_B when activated by V_USER_S2.
S2 VCC COIL_B CTRL_S2 0 SW_PUSH

* -----------------------------------------------------------------------------
* Control Circuit (Relay Coils)
* -----------------------------------------------------------------------------
* Relay K1 Coil Circuit
* K1 Coil: Connects between COIL_A and 0. Modeled as L+R.
L_K1 COIL_A K1_INT 10m
R_K1 K1_INT 0 100
* D1: 1N4007 Diode, function: Flyback protection.
* Cathode to COIL_A, Anode to 0.
D1 0 COIL_A D_1N4007

* Relay K2 Coil Circuit
* K2 Coil: Connects between COIL_B and 0. Modeled as L+R.
L_K2 COIL_B K2_INT 10m
R_K2 K2_INT 0 100
* D2: 1N4007 Diode, function: Flyback protection.
* Cathode to COIL_B, Anode to 0.
D2 0 COIL_B D_1N4007

* -----------------------------------------------------------------------------
* Power Circuit (Motor Drive via Relay Contacts)
* -----------------------------------------------------------------------------
* Relay K1 Contacts (SPDT)
* COM: MOT_A
* NO: VCC (Connected when Coil is Energized/High)
* NC: 0   (Connected when Coil is De-energized/Low)
S_K1_NO VCC MOT_A COIL_A 0 SW_NO_RELAY
S_K1_NC MOT_A 0   COIL_A 0 SW_NC_RELAY

* Relay K2 Contacts (SPDT)
* COM: MOT_B
* NO: VCC (Connected when Coil is Energized/High)
* NC: 0   (Connected when Coil is De-energized/Low)
S_K2_NO VCC MOT_B COIL_B 0 SW_NO_RELAY
S_K2_NC MOT_B 0   COIL_B 0 SW_NC_RELAY

* M1: 5 V DC Motor
* Modeled as a resistive load (50 Ohms) to visualize voltage polarity.
* Connects between MOT_A and MOT_B.
R_M1 MOT_A MOT_B 50

* -----------------------------------------------------------------------------
* Component Models
* -----------------------------------------------------------------------------
* Standard Diode Model
.model D_1N4007 D(IS=1N N=1 RS=0.1 BV=1000 IBV=10u)

* Pushbutton Switch Model (Normally Open)
* Closes (Low R) when Control Voltage > 2.5V
.model SW_PUSH SW(Vt=2.5 Vh=0.1 Ron=0.01 Roff=10Meg)

* Relay Contact Models
* NO (Normally Open): Conducts when Coil > 2.5V
.model SW_NO_RELAY SW(Vt=2.5 Vh=0.1 Ron=0.01 Roff=10Meg)

* NC (Normally Closed): Conducts when Coil < 2.5V
* SPICE SW Logic: If V < Vt, R = Roff. If V > Vt, R = Ron.
* For NC: We want Low R when V < Vt. So Roff=0.01, Ron=10Meg.
.model SW_NC_RELAY SW(Vt=2.5 Vh=0.1 Ron=10Meg Roff=0.01)

* -----------------------------------------------------------------------------
* Output Directives
* -----------------------------------------------------------------------------
* Outputs: Motor Terminals (MOT_A, MOT_B)
* Inputs: Coil Control Voltages (COIL_A, COIL_B)
.print tran V(MOT_A) V(MOT_B) V(COIL_A) V(COIL_B) I(L_K1)

.op
.end

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)

Analysis: At 1ms, S1 activates, energizing Coil A (approx 5V). Consequently, MOT_A goes to 5V while MOT_B stays near 0V (Forward). At 3ms, S1 releases and the motor stops. At 5ms, S2 activates, energizing Coil B. MOT_B goes to 5V while MOT_A stays near 0V (Reverse). Inductive kickback is visible on coil nodes when switches open.
Show raw data table (1104 rows)
Index   time            v(mot_a)        v(mot_b)        v(coil_a)       v(coil_b)       l_k1#branch
0	0.000000e+00	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
1	1.000000e-07	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
2	2.000000e-07	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
3	4.000000e-07	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
4	8.000000e-07	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
5	1.600000e-06	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
6	3.200000e-06	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
7	6.400000e-06	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
8	1.280000e-05	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
9	2.280000e-05	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
10	3.280000e-05	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
11	4.280000e-05	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
12	5.280000e-05	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
13	6.280000e-05	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
14	7.280000e-05	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
15	8.280000e-05	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
16	9.280000e-05	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
17	1.028000e-04	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
18	1.128000e-04	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
19	1.228000e-04	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
20	1.328000e-04	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
21	1.428000e-04	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
22	1.528000e-04	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
23	1.628000e-04	5.000000e-09	5.000000e-09	4.999931e-05	4.999931e-05	4.999931e-07
... (1080 more rows) ...

Common mistakes and how to avoid them

  1. Wiring the Motor to NO/NC instead of COM:
    • Mistake: Connecting the motor to the Normally Open or Closed pins, and power to the Common pin.
    • Solution: Always connect the Load (Motor) to the Common (COM) pin of the SPDT relay for H-bridge configurations. Power and Ground go to NO and NC.
  2. Omitting Flyback Diodes:
    • Mistake: Forgetting D1 and D2 across the relay coils.
    • Solution: Always install diodes in reverse bias across coils to prevent high-voltage spikes from damaging switches or power supplies when the relay turns off.
  3. Using SPST Relays:
    • Mistake: Attempting this topology with 4-pin relays that lack a Normally Closed contact.
    • Solution: Ensure you use 5-pin SPDT relays so the motor can be grounded when the relay is off.

Troubleshooting

  • Motor vibrates but does not spin:
    • Cause: Power supply current is insufficient.
    • Fix: Check the current rating of your power supply; motors draw high current upon startup.
  • Relay clicks but motor does not move:
    • Cause: Burnt internal contacts or loose wiring on the COM/NO/NC terminals.
    • Fix: Verify continuity between COM and NO when the relay is active using a multimeter.
  • Sparks visible inside the relay:
    • Cause: Inductive load kickback from the motor.
    • Fix: While not always fatal, adding a small capacitor (e.g., 100 nF) across the motor terminals can reduce arcing and noise.

Possible improvements and extensions

  1. Limit Switches: Add Normally Closed limit switches in series with the relay coils (COIL_A and COIL_B) to automatically stop the motor when a mechanism reaches its end of travel.
  2. Speed Control: Insert a high-wattage rheostat or a PWM transistor driver in series with the main VCC supply to the relay contacts (not the coils) to vary the motor speed.

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Quick Quiz

Question 1: What is the primary objective of the circuit described in the text?




Question 2: Which type of relay is specifically required for this project?




Question 3: What happens to the motor in the 'Idle State' when no buttons are pressed?




Question 4: Which real-world scenario is NOT mentioned as a use case for this circuit?




Question 5: According to the text, what occurs when Button A is pressed?




Question 6: How is the 'Reverse State' achieved in this circuit?




Question 7: What is the result if both Button A and Button B are pressed simultaneously?




Question 8: In the context of this circuit, what does 'dynamic braking' refer to?




Question 9: What voltage level is applied to the motor to achieve the Forward State in this example?




Question 10: Which of the following is listed as an industrial application for this circuit?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

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