Practical case: LC filter to remove noise in DC

Materials

• 1 × L1: Inductor, 100 µH, ≥0.3 A current rating (low DCR preferred)
• 1 × C1: Electrolytic capacitor, 100 µF, ≥10 V
• 1 × R_LOAD: Resistor, 220 Ω, 0.25 W
• 1 × Breadboard and jumper wires
• 1 × Function generator with DC offset capability
• 1 × Oscilloscope (2 channels) and probes
• 1 × Digital multimeter (DMM)

Wiring guide

• Build a simple LC low‑pass:
• Place L1 in series between the noisy supply node (+V) and the output node (filtered).
• Connect C1 from the output node to GND. Respect polarity: C1 negative to GND.
• Connect R_LOAD from the output node to GND to provide a steady load.
• Source setup (noisy DC):
• Configure the function generator to sine ripple 100 mVpp at 50 kHz with a +5 V DC offset.
• Connect the generator output (+) to the +V node at the top of L1.
• Connect the generator ground (−) to the common GND node of the circuit.
• Oscilloscope and DMM:
• Abbreviations used in the schematic:
  • V_IN: Voltage at the noisy DC input node (before L1), measured to GND.
  • V_OUT: Voltage at the filtered output node (after L1, at the top of C1/R_LOAD), measured to GND.
• Scope CH1 to V_IN (probe tip at V_IN dot, ground clip to GND).
• Scope CH2 to V_OUT (probe tip at V_OUT dot, ground clip to GND).
• Use the DMM to verify DC levels at V_IN and V_OUT.

Schematic

           +5 V (entrada ruidosa)
                 │
                 ● CH1         VIN
                 │
                ┌┴┐
                │ │    L1 = 100 µH (serie)
                │ │
                └┬┘
                 │
                 ├────● CH2───● DMM──── VOUT ─────────────> salida filtrada
                 │      │        │
                 │      │        │
                 │      ├───┬────┴─────┬───
                 │      │   │          │
                ┌┴┐    ┌┴┐ ┌┴┐        ┌┴┐
                │ │    │ │ │ │        │ │
                │ │    │ │ │ │        │ │
                └┬┘    └┬┘ └┬┘        └┬┘
                 │      │   │          │
                 │ C1   │ C2│       RLOAD
                 ├──────┴───┴──────────┤
                 │
                GND

Measurements and tests

• Initial checks:

  • Verify C1 polarity (− to GND) and solid ground connections.
  • With the generator OFF, measure R_LOAD with the DMM (~220 Ω).

• DC levels:

  • Measure V_IN (DMM on DC volts): should be ≈ +5.00 V.
  • Measure V_OUT (DMM on DC volts): should be close to +5.00 V (slightly lower if L1 has DCR).

• Ripple attenuation (steady frequency):

  • On the scope, measure V_IN ripple (CH1, AC coupling, measure Vpp at 50 kHz).
  • Measure V_OUT ripple (CH2, AC coupling, Vpp at 50 kHz).
  • Compute attenuation = 20·log10(Vpp(V_OUT)/Vpp(V_IN)); expect strong reduction.

• Frequency response (quick sweep):

  • Set ripple to 20 mVpp to avoid clipping and sweep: 500 Hz, 1 kHz, 5 kHz, 10 kHz, 50 kHz, 100 kHz.
  • At each frequency, note Vpp at V_IN and V_OUT and calculate attenuation.
  • Observe that attenuation increases above the LC cutoff fc ≈ 1/(2π√(L·C)) ≈ 1.6 kHz for 100 µH and 100 µF.

• Load effect:

  • Replace R_LOAD with 100 Ω, then 470 Ω, and observe changes in V_OUT DC and ripple.
  • Note: Heavier loads increase current and may show a small DC drop across L1’s DCR.

• Sanity tests:

  • Temporarily bypass L1 (short it) and confirm the ripple at V_OUT ≈ V_IN.
  • Restore L1 and confirm ripple reduction returns.

Common mistakes

• Using a polarized capacitor backwards; electrolytic C1 must have its negative lead to GND.
• Forgetting to connect function generator ground to circuit GND, causing noisy or floating readings.
• Using an inductor with too high DCR; excessive DC drop reduces V_OUT.
• Measuring ripple with DMM in DC mode; use the scope with AC coupling for ripple Vpp.

Safety notes

• Keep generator ripple small (≤100 mVpp) to avoid exceeding capacitor ripple current and voltage limits.
• Verify component voltage ratings exceed the DC offset used.
• Avoid shorting the generator; start with low amplitude and increase gradually.

Extensions and improvements

• Add a 100 nF ceramic in parallel with C1 to improve very high‑frequency attenuation.
• Try different L/C values to shift cutoff frequency and compare attenuation vs size and cost.
• Replace R_LOAD with an actual device (e.g., a 5 V LED strip with series resistor) and observe ripple behavior.

Validation: The schematic shows +V at the top and GND at the bottom, components are labeled (L1, C1, R_LOAD), and measurement points are marked with black dots (V_IN, V_OUT); all connections are continuous with no floating nodes.

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Carlos Núñez Zorrilla

Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

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