Objective and use case

You will construct a binary ripple counter circuit utilizing the 74HC393 integrated circuit to process a high-speed input clock. By dividing the frequency by factors of 2, 4, 8, and 16, a physical jumper acts as a selector to route a specific down-scaled output to a visual LED indicator.

This topology is highly useful in practical electronics for several reasons:
* Generating precise, slow timebases for digital clocks from high-frequency crystal oscillators.
* Stepping down high-frequency PWM signals for specific motor control applications.
* Creating multiple synchronized sub-harmonic frequencies for audio synthesizers.
* Converting a rapidly blinking indicator into a manageable, visually observable pulse.

Expected outcomes:
* The CLK input will receive a constant square wave.
* The outputs QA, QB, QC, and QD will cleanly toggle at exactly 1/2, 1/4, 1/8, and 1/16 of the clock frequency, respectively.
* Selecting different outputs via the jumper will visibly change the LED blink rate without altering the main clock source.

Target audience and level: Electronics students and hobbyists wanting hands-on experience with asynchronous logic and frequency scaling.

Materials

• V1: 5 V DC power supply, function: logic power source
• VCLK: 5 V square wave clock source (e.g., function generator), function: input clock
• U1: 74HC393 Dual 4-Bit Binary Ripple Counter, function: frequency divider
• J1: 4-pin header block with jumper shunt, function: output selector
• R1: 330 Ω resistor, function: LED current limiting
• D1: Red LED, function: selected output state indicator

Wiring guide

• V1: connects between node VCC and node 0.
• VCLK: connects between node CLK and node 0.
• U1 Pin 14 (VCC): connects to node VCC.
• U1 Pin 7 (GND): connects to node 0.
• U1 Pin 1 (1CP): connects to node CLK.
• U1 Pin 2 (1MR): connects to node 0.
• U1 Pin 3 (1Q0): connects to node QA and selector terminal 1 of J1.
• U1 Pin 4 (1Q1): connects to node QB and selector terminal 2 of J1.
• U1 Pin 5 (1Q2): connects to node QC and selector terminal 3 of J1.
• U1 Pin 6 (1Q3): connects to node QD and selector terminal 4 of J1.
• J1 common terminal: connects to node VOUT.
• R1: connects between node VOUT and node N_LED.
• D1: connects between node N_LED (Anode) and node 0 (Cathode).

Conceptual block diagram

Measurements and tests

1. Clock Setup: Configure VCLK to output a 16 Hz square wave (0 to 5 V). Verify this signal by connecting an oscilloscope channel to node CLK.
2. Divide-by-2 Validation: Place the jumper J1 to connect node QA to VOUT. The LED D1 should blink at 8 Hz. Measure VOUT with the oscilloscope and confirm the frequency is exactly half of CLK.
3. Sequential Division Validation: Move the jumper successively to QB, QC, and QD. Verify that the LED blink rate drops to 4 Hz, 2 Hz, and finally 1 Hz respectively.
4. Ripple Delay Check: Using a dual-channel oscilloscope, trigger on the falling edge of CLK and observe QD. Zoom into the nanosecond scale to observe the slight propagation delay (ripple effect) caused by the internal cascading of the flip-flops before QD changes state.

Common mistakes and how to avoid them

• Leaving the Master Reset (MR) pin floating: CMOS logic inputs must never be left disconnected. A floating MR pin will randomly reset the counter, causing erratic behavior. Always tie it directly to Ground (0) if not used.
• Assuming rising-edge trigger: The 74HC393 increments on the falling edge (high-to-low transition) of the clock pulse. Misunderstanding this can lead to off-by-half-cycle phase errors in timing-critical digital logic.
• Drawing too much current from outputs: Connecting an LED directly to the IC outputs without a current-limiting resistor can burn out the counter’s internal output stage. Always ensure R1 is in place.

Troubleshooting

• Symptom: Counter does not advance, LED stays off or statically on.
  • Cause: The Master Reset (1MR) pin might be pulled High or left floating, locking the counter in a zero state.
  • Fix: Ensure Pin 2 is firmly connected to 0 (GND).
• Symptom: Output frequencies are erratic or much faster than expected.
  • Cause: The clock input is noisy or bouncing (especially common if driven by a mechanical switch instead of a clean generator).
  • Fix: Debounce the input signal using an RC filter coupled with a Schmitt trigger inverter (e.g., 74HC14) before feeding it to CLK.
• Symptom: LED appears constantly dim regardless of jumper position.
  • Cause: The clock frequency is set too high (e.g., 1 kHz or more). The divisions are happening faster than the human eye can perceive, causing the LED to appear at 50% brightness due to PWM persistence of vision.
  • Fix: Lower VCLK frequency to below 20 Hz for visual observation.

Objective and use case

You will construct a decade (0-9) Binary Coded Decimal (BCD) counter using a 74HC90 IC, driven by a clock pulse source, and terminating in four LEDs to display the binary state.

This circuit is highly useful in real-world applications for:
* Building fundamental digital clock circuits (seconds and minutes counters).
* Event counting systems on manufacturing lines.
* Understanding logic state machines and frequency dividers (divide-by-10).
* Creating foundational timing circuits without the need for microcontrollers.

Expected outcome:
* The circuit will automatically count from 0000 (decimal 0) to 1001 (decimal 9) in binary.
* A transient validation will show the CLK signal alongside the state of QA, QB, QC, and QD.
* Pressing the manual reset button will immediately pull the RST node HIGH and force the outputs to 0000.
* The LEDs will visually blink according to their respective binary significance (QA toggling fastest, QD toggling slowest).

Target audience and level: Intermediate electronics students learning sequential logic and counters.

Materials

• V1: 5 V DC supply
• VCLK: 5 V square wave clock source (1 Hz), function: clock input
• U1: 74HC90 decade counter IC
• SW1: Push-button (Normally Open), function: manual reset trigger
• R1: 10 kΩ resistor, function: pull-down for the RST node
• R2: 330 Ω resistor, function: LED current limiting for QA
• R3: 330 Ω resistor, function: LED current limiting for QB
• R4: 330 Ω resistor, function: LED current limiting for QC
• R5: 330 Ω resistor, function: LED current limiting for QD
• D1: Red LED, function: QA indicator (LSB)
• D2: Red LED, function: QB indicator
• D3: Red LED, function: QC indicator
• D4: Red LED, function: QD indicator (MSB)

Conceptual block diagram

Measurements and tests

• Clock validation: Monitor the CLK node on an oscilloscope or transient plot to verify a consistent square wave.
• Counting sequence: Plot QA, QB, QC, and QD simultaneously. Observe that QA toggles on every falling edge of CLK, and that the binary state progresses correctly from 0000 to 1001.
• BCD Wrap-around: Watch the transition after 1001 (decimal 9). The very next clock pulse should automatically return all outputs (QA–QD) back to 0000 (decimal 0) instead of proceeding to 1010 (decimal 10).
• Manual Reset: While the counter is at any non-zero state (e.g., 0101), actuate SW1. Observe that the RST node spikes to 5 V, forcing QA, QB, QC, and QD to 0000 immediately, ignoring the CLK signal until the button is released.

Common mistakes and how to avoid them

• Forgetting to connect QA to CKB: The 74HC90 is internally split into a divide-by-2 and a divide-by-5 section. If you do not bridge pin 12 (QA) to pin 1 (CKB), the IC will only count from 0 to 1 and stop, or will not generate the proper BCD sequence.
• Leaving reset pins floating: CMOS logic inputs (like the 74HC series) must never be left disconnected. Leaving MS1, MS2, or the MR pins floating will cause the counter to randomly reset due to ambient electrical noise. Ensure they are tied firmly to 0 or managed via a pull-down resistor.
• Swapping the output bits: Reading the LEDs in the wrong order is very common. Always remember that QA is the Least Significant Bit (LSB, toggles fastest) and QD is the Most Significant Bit (MSB, toggles slowest).

Troubleshooting

• Symptom: All LEDs remain entirely off, and the counter never advances.
  • Cause: The Master Reset (MR1 and MR2) or Master Set (MS1 and MS2) pins might be receiving a logic HIGH.
  • Fix: Check that SW1 is not stuck closed, ensure R1 (pull-down) is properly connected to ground, and verify MS1/MS2 are wired directly to 0.
• Symptom: The counter counts wildly or skips numbers unexpectedly.
  • Cause: The clock signal (CLK) lacks debouncing, or there is missing power supply decoupling.
  • Fix: If using a mechanical switch for a clock instead of a clean generator, add a hardware debounce circuit (RC + Schmitt trigger). Additionally, place a 100 nF capacitor directly between VCC and GND near the IC.
• Symptom: The count goes up to 5 and resets (0, 1, 2, 3, 4, 0…).
  • Cause: The clock inputs are wired backwards. The clock is entering CKB and cascading into CKA.
  • Fix: Ensure the external clock goes exclusively to CKA (pin 14) and QA bridges to CKB (pin 1).

Objective and use case

You will build a decimal counter based on a 74LS93 ripple counter and a 74HCT08 AND gate. The circuit counts from 0000 to 1001 and automatically resets when 1010 appears.

This is useful for:
– Simple event counters with a decimal display interface
– Clock divider stages for timing experiments
– Learning how asynchronous reset works in ripple counters
– Testing TTL-to-CMOS/HCT logic compatibility in mixed logic designs

Expected outcome:
– QA, QB, QC, and QD show a binary count sequence from 0 to 9
– RESET_NODE goes HIGH only when QB = 1 and QD = 1
– The counter clears immediately when state 1010 is reached
– LEDs on the four outputs visibly repeat the decimal cycle
– Logic supply remains at +5 V, with TTL-compatible levels between the 74LS93 and 74HCT08

Target audience and level: Students and technicians with basic digital electronics experience.

Materials

• U1: 74LS93 4-bit ripple counter, function: binary count generation
• U2: 74HCT08 quad 2-input AND gate, function: TTL-compatible reset detection
• V1: 5 V DC supply, function: power for the logic circuit
• X1: clock source 0-5 V square wave, function: CLK_IN signal
• D1: red LED, function: QA indicator
• D2: red LED, function: QB indicator
• D3: red LED, function: QC indicator
• D4: red LED, function: QD indicator
• R1: 330 Ω resistor, function: current limiting for D1
• R2: 330 Ω resistor, function: current limiting for D2
• R3: 330 Ω resistor, function: current limiting for D3
• R4: 330 Ω resistor, function: current limiting for D4
• C1: 100 nF capacitor, function: local decoupling for U1
• C2: 100 nF capacitor, function: local decoupling for U2

Conceptual block diagram

Common mistakes and how to avoid them

1. Using 74HC08 instead of 74HCT08
2. Problem: the 74LS93 HIGH level may not meet standard HC input thresholds reliably.

3. Solution: use 74HCT08 for TTL-compatible input levels.

4. Forgetting the QA to CP1 connection

5. Problem: the 74LS93 will not count correctly through the intended 4-bit sequence.

6. Solution: connect U1 pin 12 (QA) directly to U1 pin 1 (CP1).

7. Reset inputs not tied together

8. Problem: the counter may not clear when 1010 occurs.
9. Solution: connect both R0(1) and R0(2) to the same RESET_NODE.

Troubleshooting

• Symptom: The count goes beyond 9.
• Cause: QB or QD is not correctly connected to the AND gate.

• Fix: verify U2 pin 1 = QB, U2 pin 2 = QD, and U2 pin 3 = RESET_NODE.

• Symptom: The circuit never counts.

• Cause: RESET_NODE is stuck HIGH.

• Fix: check for miswiring, shorts, or swapped AND gate pins.

• Symptom: LEDs behave randomly at power-up.

• Cause: ripple counters can power up in an undefined state.

• Fix: apply a short reset pulse at startup.

• Symptom: Reset is unreliable.

• Cause: wrong logic family used for the reset gate.

• Fix: replace any 74HC08 with 74HCT08.

• Symptom: Only the first stage toggles.

• Cause: missing cascade connection from QA to CP1.
• Fix: reconnect U1 pin 12 to U1 pin 1.

Objective and use case

In this practical case, you will build an automatic reservoir pump controller. The circuit uses a mechanical float switch to trigger an NPN transistor, which energizes an electromechanical relay to drive a high-current DC pump (simulated here as a resistive load) and a status LED.

Why this is useful:
* Automates water level management in tanks, reservoirs, and sump basins.
* Safely isolates low-voltage control circuits from high-power loads.
* Demonstrates the practical interfacing of simple mechanical sensors with power electronics.
* Prevents overflow or dry-running conditions in industrial and agricultural settings.

Expected outcome:
* Closing the float switch applies a voltage to the transistor base, turning it on (saturation).
* The transistor sinks current for the relay coil, energizing it and closing its normally open (NO) contact.
* The simulated DC pump (load resistor) receives the full supply voltage.
* The status indicator LED illuminates when the pump is active.
* Releasing the switch de-energizes the relay, and the flyback diode safely dissipates the inductive voltage spike from the coil.

Target audience: Intermediate electronics students learning about transistor switching, electromechanical relays, and inductive load protection.

Materials

• V1: 12 V DC supply, function: main power for relay coil and pump
• V2: 5 V DC supply, function: control logic power for the float switch
• SW1: SPST switch, function: simulated float switch or high-level sensor
• R1: 1 kΩ resistor, function: transistor base current limiting
• R2: 10 kΩ resistor, function: pull-down for transistor base to ensure turn-off
• R3: 1 kΩ resistor, function: LED current limiting
• RLOAD: 50 Ω high-power resistor, function: simulated DC pump load
• Q1: 2N2222 NPN transistor, function: relay coil driver
• D1: 1N4007 diode, function: flyback protection for relay coil
• D2: Green LED, function: pump status indicator
• K1: 12 V SPDT Relay, function: electromechanical switch for the pump

Wiring guide

• V1 connects between node VCC12 and node 0.
• V2 connects between node VCC5 and node 0.
• SW1 connects between node VCC5 and node SENSE.
• R1 connects between node SENSE and node VB.
• R2 connects between node VB and node 0.
• Q1 base connects to node VB, emitter connects to node 0, and collector connects to node COIL_NEG.
• K1 coil connects between node VCC12 and node COIL_NEG.
• K1 COM (Common) contact connects to node VCC12.
• K1 NO (Normally Open) contact connects to node LOAD_SW.
• D1 cathode connects to node VCC12 and anode connects to node COIL_NEG (placed anti-parallel to the relay coil).
• RLOAD connects between node LOAD_SW and node 0.
• R3 connects between node LOAD_SW and the anode of D2.
• D2 cathode connects to node 0.

Conceptual block diagram

Measurements and tests

1. Control Logic Test: With SW1 open, measure the voltage at node SENSE. It should be 0 V. Close SW1 and verify the voltage rises to 5 V.
2. Base Drive Verification: Measure the voltage at node VB with SW1 closed. It should read approximately 0.7 V, confirming the base-emitter junction of Q1 is forward-biased.
3. Coil Switching Verification: Probe node COIL_NEG. When SW1 is open, it should measure 12 V. When SW1 is closed, it should drop to near 0 V (Vce_sat of the transistor), confirming the coil is energized.
4. Load Delivery Test: Measure the voltage at node LOAD_SW. Verify that it reads 0 V when the relay is off, and jumps to 12 V when the relay clicks on. Check that the RLOAD draws current and D2 illuminates.

Common mistakes and how to avoid them

• Missing flyback diode (D1): When the relay turns off, the collapsing magnetic field in the coil generates a massive voltage spike. Without D1 to provide a safe discharge path, this spike will instantly destroy Q1. Always place D1 reverse-biased across the coil.
• Insufficient base drive current: If R1 is too large, Q1 will operate in its linear region instead of fully saturating. This will cause the transistor to overheat and the relay may fail to actuate reliably. Always ensure R1 provides enough base current (Ib) for the required collector current (Ic).
• Undersized relay contacts: Motors and pumps draw a massive «inrush» current when starting up. Using a relay rated exactly for the running current will cause the contacts to weld shut or burn. Always select a relay rated for at least 2-3 times the load’s continuous current.

Troubleshooting

• Symptom: The relay chatters or buzzes rapidly instead of latching cleanly.
• Cause: The 12 V power supply is too weak and drops voltage under the heavy load of the pump, causing the relay coil to lose holding power, disconnect the load, recover, and repeat.
• Fix: Use a bench power supply with a higher current capacity or test with a battery.
• Symptom: Transistor Q1 becomes extremely hot and fails.
• Cause: Missing flyback diode, or the relay coil’s current demand exceeds the maximum collector current of the 2N2222.
• Fix: Verify D1 is correctly installed. Check the relay coil resistance; ensure it draws less than 600 mA.
• Symptom: Circuit turns on randomly without float switch action.
• Cause: The base of Q1 is floating, picking up environmental electromagnetic interference.
• Fix: Ensure the pull-down resistor R2 is securely connected between node VB and ground.
• Symptom: The LED turns on, but the simulated pump (RLOAD) does not work.
• Cause: Broken connection at the relay NO contact or a blown load resistor.
• Fix: Check the wiring between the relay’s NO pin and LOAD_SW. Verify the resistance of RLOAD with a multimeter.

Objective and use case

In this practical case, you will build a hardware-based overvoltage protection circuit. It uses a Zener diode to set a voltage threshold and a bipolar junction transistor (BJT) to actuate an electromechanical relay, mechanically disconnecting power when the voltage spikes to dangerous levels.

This topology is highly useful in real-world scenarios:
– Safeguarding sensitive 5 V microcontrollers from accidental power supply surges.
– Protecting expensive sensors or instruments in automotive environments where alternator spikes occur.
– Ensuring battery-powered or USB-powered devices mechanically cut out during a charger regulator failure.

Expected outcome:
– When the input voltage (v-in) is in the safe range (e.g., 5.0 V), the BJT remains off, the relay is unpowered, and the normally closed (NC) contact feeds power to the load.
– When v-in exceeds the Zener threshold plus the BJT base-emitter drop (around 6.3 V), the Zener conducts.
– Base current flows, the BJT switch turns on, and the relay coil energizes.
– The relay’s NC contact opens, triggering a v-load-disconnect event that drops the load voltage to 0 V.
– Target audience and level: Intermediate electronics students exploring analog voltage thresholds and electromechanical switching.

Materials

• V1: Variable DC supply (0-9 V), function: provides system input voltage (v-in)
• D1: 5.6 V Zener diode (e.g., 1N4734 A), function: sets the overvoltage threshold reference
• R1: 1 kΩ resistor, function: base current limiting for the BJT
• R2: 10 kΩ resistor, function: base pull-down to ensure the BJT turns off cleanly
• Q1: 2N3904 NPN transistor, function: relay driver switch
• D2: 1N4148 or 1N4007 diode, function: flyback protection for the relay coil
• K1: 5 V SPDT Relay, function: disconnects the load using its normally closed (NC) contact
• R_LOAD: 100 Ω resistor, function: simulated critical load

Wiring guide

• V1: positive terminal connects to node V_IN, negative terminal connects to node 0 (GND).
• D1: cathode connects to node V_IN, anode connects to node V_ZENER.
• R1: connects between node V_ZENER and node BASE.
• R2: connects between node BASE and node 0.
• Q1: collector connects to node COLLECTOR, base connects to node BASE, emitter connects to node 0.
• K1_COIL: the relay coil connects between node V_IN and node COLLECTOR.
• D2: cathode connects to node V_IN, anode connects to node COLLECTOR (wired anti-parallel to the relay coil).
• K1_COM: the relay’s common contact connects to node V_IN.
• K1_NC: the relay’s normally closed contact connects to node LOAD_PWR.
• R_LOAD: connects between node LOAD_PWR and node 0.

Conceptual block diagram

Measurements and tests

1. Set the variable power supply V1 to exactly 5.0 V.
2. Measure v-in relative to ground. Verify it is 5.0 V.
3. Measure the voltage across the load (LOAD_PWR to 0). It should read 5.0 V, indicating the relay is deactivated and the NC contact is closed.
4. Slowly increase the voltage of V1. Monitor v-zener (the voltage at the anode of D1). It will remain near 0 V until v-in crosses the ~5.6 V breakdown threshold of the Zener diode.
5. Push V1 up to 6.5 V. Observe that v-zener rises, pushing current into the base of Q1.
6. Verify the v-load-disconnect event: listen for the relay click. Measure the voltage at LOAD_PWR; it should instantly drop to 0 V as the NC contact opens, successfully protecting the load.

Common mistakes and how to avoid them

• Omitting the flyback diode (D2): Failing to place a diode across the relay coil will result in a massive inductive voltage spike when the transistor turns off, permanently destroying the BJT. Always include the anti-parallel diode.
• Installing the Zener diode backward: If the Zener is installed forward-biased (anode to V_IN), it will act like a standard diode with a 0.7 V drop. The relay will trigger almost immediately. Ensure the cathode faces the positive input.
• Wiring the load to the NO contact: If you accidentally connect R_LOAD to the Normally Open (NO) terminal instead of the NC terminal, the load will only receive power during an overvoltage event, which defeats the purpose of the protection circuit.

Troubleshooting

• Symptom: The relay chatters rapidly or buzzes when the input voltage is right at the threshold (e.g., 6.2 V).
• Cause: The circuit lacks hysteresis. A slow-moving analog voltage at the exact threshold causes the BJT to partially turn on, putting the relay in an undefined mechanical state.
• Fix: In a practical setup, overvoltage events are usually fast spikes. For slow-rising voltages, a Schmitt trigger or a latching circuit is required to ensure a clean transition.
• Symptom: The load never powers on, even at 5.0 V.
• Cause: The relay might be stuck energized, the BJT is shorted, or the load was mistakenly wired to the NO contact.
• Fix: Check LOAD_PWR continuity to V_IN while the circuit is unpowered. Replace Q1 if it reads a dead short from collector to emitter.
• Symptom: The transistor gets exceptionally hot during an overvoltage event.
• Cause: The input voltage was raised far beyond the threshold (e.g., 12 V into a 5 V relay), causing excessive coil current through the BJT.
• Fix: Do not exceed the absolute maximum ratings of the relay coil and the 2N3904 transistor. If higher voltages are expected, use a beefier transistor (like a TIP120) or a pre-regulator.