Level: Medium – Analyze a Graetz bridge to convert AC to pulsating DC and measure total voltage drop.

Objective and use case

In this practical case, you will build a standard Graetz bridge circuit using four diodes and an AC voltage source to supply a resistive load. This circuit converts an alternating current input (where voltage polarity changes) into a pulsating direct current output (where voltage polarity remains positive).

Why it is useful:
* Power Supplies: It is the fundamental first stage in converting AC mains power to DC for charging laptops, phones, and powering appliances.
* Motor Control: Used in DC motor drives to run motors from an AC supply.
* Polarity Protection: Ensures that a device works correctly regardless of how the input power wires are connected.
* High Efficiency: Utilizes both the positive and negative half-cycles of the AC input, unlike a half-wave rectifier.

Expected outcome:
* Input Signal: A sinusoidal waveform (e.g., 12 V RMS / ~17 V Peak) at 60Hz.
* Output Signal: A series of positive «mounds» (pulsating DC) at 120Hz (double the input frequency).
* Voltage Drop: The peak output voltage will be approximately 1.4 V lower than the peak input voltage due to the forward voltage drop of two diodes in series (2 × 0.7 V).
* Current Flow: Current flows through the load resistor in the same direction during both AC half-cycles.

Target audience and level: Electronics students and hobbyists familiar with basic diode biasing.

Materials

• V1: AC Voltage Source (Amplitude: 17 V [12Vrms], Frequency: 60Hz), function: Input supply
• D1: 1N4007 Diode, function: Rectifier (Bridge arm 1)
• D2: 1N4007 Diode, function: Rectifier (Bridge arm 2)
• D3: 1N4007 Diode, function: Rectifier (Bridge arm 3)
• D4: 1N4007 Diode, function: Rectifier (Bridge arm 4)
• R1: 1 kΩ resistor, function: Output Load

Wiring guide

This guide uses specific node names to represent the connections. Ensure the AC source is floating relative to the DC ground to simulate the isolation provided by a transformer.

• V1 (Positive terminal) connects to node AC1.
• V1 (Negative terminal) connects to node AC2.
• D1 (Anode) connects to node AC1.
• D1 (Cathode) connects to node VOUT.
• D2 (Anode) connects to node AC2.
• D2 (Cathode) connects to node VOUT.
• D3 (Anode) connects to node 0 (GND).
• D3 (Cathode) connects to node AC1.
• D4 (Anode) connects to node 0 (GND).
• D4 (Cathode) connects to node AC2.
• R1 connects between node VOUT and node 0 (GND).

Conceptual block diagram

Schematic

[ INPUT SOURCE ]               [ PROCESSING / LOGIC ]               [ OUTPUT LOAD ]

[ AC Source V1 ]
(17 V Amp / 60Hz)
       |
       +----(Node AC1)----->+-----------------------------+
                            |    FULL-WAVE BRIDGE         |
                            |                             |
                            |  [ Diodes D1 & D2 ]         |
                            |  (Direct Positive Peaks)    |--(Node VOUT)--> [ Resistor R1 ]
                            |                             |                 (1 kOhm)
                            |                             |                     |
       +----(Node AC2)----->|  [ Diodes D3 & D4 ]         |                     |
       |                    |  (Direct Negative Peaks)    |                     v
       |                    |  (Create Return Path)       |                    GND
(Source Return)             |                             |
                            +-----------------------------+
                                          |
                                          v
                                     (Node 0/GND)

Electrical diagram

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Measurements and tests

Perform the following steps to validate the circuit operation using an oscilloscope or a multimeter:

1. Input Verification: Connect channel 1 of the oscilloscope across AC1 and AC2. Verify a full sine wave with a frequency of 60Hz.
2. Output Visualization: Connect channel 2 of the oscilloscope across R1 (Probe on VOUT, Clip on 0). Observe that the negative portions of the sine wave have been «flipped» up, creating a continuous chain of positive pulses.
3. Frequency Measurement: Measure the frequency of the signal at VOUT. It should be exactly 120Hz (double the input frequency).
4. Voltage Drop Analysis: Measure the peak voltage of the Input (Vpeakin) and the peak voltage of the Output (Vpeakout).
   • Vpeakout should be approximately Vpeakin – 1.4 V. This accounts for the 0.7 V drop across D1 and 0.7 V drop across D4 (during one cycle) or D2 and D3 (during the other).

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Title: Practical case: Full-wave bridge rectifier

* --- Component Instantiation ---

* V1: AC Voltage Source (Amplitude: 17 V, Frequency: 60Hz)
* Wiring: V1 (Positive) -> AC1, V1 (Negative) -> AC2
* Note: Source is floating relative to ground (Node 0), connected only to the bridge.
V1 AC1 AC2 SIN(0 17 60)

* D1: 1N4007 Diode (Bridge arm 1)
* Wiring: Anode -> AC1, Cathode -> VOUT
D1 AC1 VOUT 1N4007

* D2: 1N4007 Diode (Bridge arm 2)
* Wiring: Anode -> AC2, Cathode -> VOUT
D2 AC2 VOUT 1N4007

* D3: 1N4007 Diode (Bridge arm 3)
* Wiring: Anode -> 0 (GND), Cathode -> AC1
D3 0 AC1 1N4007
* ... (truncated in public view) ...

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* Title: Practical case: Full-wave bridge rectifier

* --- Component Instantiation ---

* V1: AC Voltage Source (Amplitude: 17 V, Frequency: 60Hz)
* Wiring: V1 (Positive) -> AC1, V1 (Negative) -> AC2
* Note: Source is floating relative to ground (Node 0), connected only to the bridge.
V1 AC1 AC2 SIN(0 17 60)

* D1: 1N4007 Diode (Bridge arm 1)
* Wiring: Anode -> AC1, Cathode -> VOUT
D1 AC1 VOUT 1N4007

* D2: 1N4007 Diode (Bridge arm 2)
* Wiring: Anode -> AC2, Cathode -> VOUT
D2 AC2 VOUT 1N4007

* D3: 1N4007 Diode (Bridge arm 3)
* Wiring: Anode -> 0 (GND), Cathode -> AC1
D3 0 AC1 1N4007

* D4: 1N4007 Diode (Bridge arm 4)
* Wiring: Anode -> 0 (GND), Cathode -> AC2
D4 0 AC2 1N4007

* R1: 1 kΩ Resistor (Output Load)
* Wiring: VOUT -> 0 (GND)
R1 VOUT 0 1k

* --- Models ---
* Standard model for 1N4007 Rectifier Diode
.model 1N4007 D (IS=7.03n RS=0.034 N=1.81 BV=1000 IBV=0.5u CJO=10p TT=0.1u)

* --- Analysis Commands ---
* Transient analysis: 60Hz period is ~16.6ms.
* Simulating 50ms to capture approximately 3 full cycles.
.tran 50u 50m

* --- Output Directives ---
* Print voltages at AC inputs (relative to GND) and the rectified Output
.print tran V(AC1) V(AC2) V(VOUT)

* Calculate DC operating point
.op

.end

Simulation Results (Transient Analysis)

Show raw data table (1016 rows)

Index   time            v(ac1)          v(ac2)          v(vout)
0	0.000000e+00	3.036573e-18	3.036573e-18	-7.53268e-22
1	5.000000e-07	1.602212e-03	-1.60221e-03	-9.54567e-15
2	1.000000e-06	3.204481e-03	-3.20437e-03	1.126318e-07
3	2.000000e-06	6.409036e-03	-6.40866e-03	3.747988e-07
4	4.000000e-06	1.281816e-02	-1.28172e-02	9.375665e-07
5	8.000000e-06	2.563689e-02	-2.56338e-02	3.056599e-06
6	1.600000e-05	5.127600e-02	-5.12650e-02	1.103556e-05
7	3.200000e-05	1.025657e-01	-1.02513e-01	5.319168e-05
8	6.400000e-05	2.053399e-01	-2.04787e-01	5.532611e-04
9	1.140000e-04	3.725509e-01	-3.57833e-01	1.471794e-02
10	1.640000e-04	5.903791e-01	-4.60003e-01	1.303764e-01
11	2.140000e-04	8.628382e-01	-5.07168e-01	3.556700e-01
12	2.640000e-04	1.155738e+00	-5.33407e-01	6.223310e-01
13	3.140000e-04	1.456815e+00	-5.50867e-01	9.059481e-01
14	3.640000e-04	1.761378e+00	-5.64128e-01	1.197250e+00
15	4.140000e-04	2.068103e+00	-5.74401e-01	1.493702e+00
16	4.640000e-04	2.375673e+00	-5.82891e-01	1.792782e+00
17	5.140000e-04	2.683430e+00	-5.90142e-01	2.093289e+00
18	5.640000e-04	2.990978e+00	-5.96439e-01	2.394538e+00
19	6.140000e-04	3.297988e+00	-6.02000e-01	2.695989e+00
20	6.640000e-04	3.604206e+00	-6.06966e-01	2.997240e+00
21	7.140000e-04	3.909408e+00	-6.11453e-01	3.297955e+00
22	7.640000e-04	4.213406e+00	-6.15537e-01	3.597869e+00
23	8.140000e-04	4.516026e+00	-6.19284e-01	3.896742e+00
... (992 more rows) ...

Common mistakes and how to avoid them

1. Ground Loops (Scope): Connecting the oscilloscope ground clip to AC1 or AC2 while the circuit is mains-referenced can cause a short circuit. Solution: Only connect the scope ground to the common circuit ground (0) at the load, or use a differential probe for the input.
2. Diode Orientation: Inserting a diode backward in the bridge. Solution: Ensure that two diodes point towards the positive DC output node (VOUT) and two diodes point away from the ground node (0).
3. Ignoring Power Ratings: Using a resistor with low wattage for R1. Solution: Calculate power P = V^2 / R. For 17 V peak, P ≈ 0.3W. Use a 0.5W resistor or greater.

Troubleshooting

• Symptom: The output looks like a half-wave rectifier (gaps between pulses).
  • Cause: One of the diodes is open (disconnected or blown).
  • Fix: Check continuity of all four diodes; replace the faulty one.
• Symptom: Zero output voltage.
  • Cause: Short circuit in the load or open circuit in the source/wiring.
  • Fix: Check connections at AC1 and AC2; ensure R1 is not shorted.
• Symptom: Input fuse blows or source current is excessive.
  • Cause: One or more diodes are shorted, or a diode is installed in reverse (creating a direct path from AC to Ground).
  • Fix: Test diodes for shorts using the diode check mode on a multimeter.

Possible improvements and extensions

1. Filtering: Add a capacitor (e.g., 470 µF) in parallel with R1 to fill in the gaps between pulses, creating a smooth DC voltage (Ripple reduction).
2. Regulation: Connect a voltage regulator (like an LM7812 or a Zener diode circuit) after the filter capacitor to produce a constant, stable DC voltage regardless of input fluctuations.

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Carlos Núñez Zorrilla

Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

Follow me:

Who we are

Level: Basic – Build a circuit to clamp load voltage using diode forward drops.

Objective and use case

In this practical case, you will build a passive voltage limiter (clipper) circuit. By placing multiple silicon diodes in series parallel to the load, you will create a hard «ceiling» for the output voltage, preventing it from exceeding the sum of the forward voltage drops of the diodes.

• Input protection: Prevents high voltage spikes from damaging sensitive microcontroller inputs (ADCs).
• Simple regulation: Provides a crude but effective constant voltage reference without a Zener diode.
• Signal conditioning: Used in audio circuits to create distortion or «fuzz» effects by clipping signal peaks.
• Logical reference: Can be used to establish specific logic threshold levels in analog computing.

Expected outcome:
* When Input Voltage < ~2.1 V: The output voltage follows the input (minus minor resistive losses).
* When Input Voltage > ~2.1 V: The output voltage clamps and remains stable at approximately 2.1 V.
* The current through the diodes increases significantly once the threshold is reached.
* Target audience: Students and hobbyists learning about diode I-V characteristics.

Materials

• V1: 0 V to 9 V Variable DC Power Supply, function: Input signal source.
• R1: 1 kΩ resistor, function: Current limiting for the diodes and source protection.
• R2: 10 kΩ resistor, function: Load resistor (simulating a downstream circuit).
• D1: 1N4148 Silicon Diode, function: First voltage drop element (~0.7 V).
• D2: 1N4148 Silicon Diode, function: Second voltage drop element (~0.7 V).
• D3: 1N4148 Silicon Diode, function: Third voltage drop element (~0.7 V).

Wiring guide

Construct the circuit following these connections. The node names (e.g., VIN, VOUT, 0) refer to specific electrical points in the circuit. Node 0 represents the Ground (GND).

• V1 (Source): Connect the positive terminal to node VIN and the negative terminal to node 0.
• R1 (Limiter): Connect one pin to node VIN and the other pin to node VOUT.
• R2 (Load): Connect one pin to node VOUT and the other pin to node 0.
• D1: Connect the Anode to node VOUT and the Cathode to intermediate node N1.
• D2: Connect the Anode to intermediate node N1 and the Cathode to intermediate node N2.
• D3: Connect the Anode to intermediate node N2 and the Cathode to node 0.

Note: This creates a chain where D1, D2, and D3 are in series with each other, and that entire string is in parallel with R2.

Conceptual block diagram

Schematic

[ INPUT SOURCE ]              [ SERIES LIMITER ]                  [ OUTPUT NODE & BRANCHES ]

                                                                 /------> [ R2: 10 kΩ Load ] ---------> GND (0)
                                                                 |
[ V1: 0-9 V Variable ] --(VIN)--> [ R1: 1 kΩ Resistor ] --(VOUT)-->+
                                                                 |
                                                                 |        [ VOLTAGE CLAMP CHAIN ]
                                                                 |
                                                                 \------> [ D1: 1N4148 ] --(N1)-->+
                                                                                                  |
                                                                          [ D2: 1N4148 ] <--------+
                                                                          |
                                                                          +--(N2)--> [ D3: 1N4148 ] --> GND (0)

Electrical diagram

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Measurements and tests

Follow these steps to validate the limiting behavior.

1. Low Voltage Test (Below Threshold):

   • Set V1 to 1.0 V.
   • Measure the voltage at VOUT relative to GND.
   • Expected Result: VOUT should be approximately 0.9 V – 1.0 V (diodes are off/high impedance; R1 and R2 form a voltage divider).

2. Transition Test (Near Threshold):

   • Set V1 to 2.5 V.
   • Measure the voltage at VOUT.
   • Expected Result: VOUT begins to lag behind VIN. Diodes start conducting. VOUT will likely be around 1.8 V to 2.0 V.

3. Clamping Test (Above Threshold):

   • Set V1 to 9.0 V.
   • Measure the voltage at VOUT.
   • Expected Result: VOUT should be clamped at approximately 2.1 V to 2.2 V (3 diodes × ~0.7 V each). It will NOT reach 9 V.

4. Transfer Curve Sweep:

   • Slowly increase V1 from 0 V to 9 V while monitoring VOUT.
   • Observe that VOUT rises linearly initially, then «knees» over and flattens out around 2.1 V.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: Voltage limiter with series diodes

* --- Power Supply / Input Signal ---
* V1: 0 V to 9 V Variable DC Power Supply
* Modeled as a linear ramp (PWL) from 0V to 9V over 10ms
* This allows the transient analysis to show the voltage limiting characteristic.
V1 VIN 0 PWL(0 0 10m 9)

* --- Resistors ---
* R1: 1 kΩ resistor (Current limiting)
* Connects VIN to VOUT
R1 VIN VOUT 1k

* R2: 10 kΩ resistor (Load)
* Connects VOUT to Ground (0)
R2 VOUT 0 10k

* --- Diodes ---
* Chain of 3 diodes in series, connected in parallel with the load (R2).
* This clamps VOUT to approximately 3 * 0.7V = 2.1V.
* ... (truncated in public view) ...

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* Practical case: Voltage limiter with series diodes

* --- Power Supply / Input Signal ---
* V1: 0 V to 9 V Variable DC Power Supply
* Modeled as a linear ramp (PWL) from 0V to 9V over 10ms
* This allows the transient analysis to show the voltage limiting characteristic.
V1 VIN 0 PWL(0 0 10m 9)

* --- Resistors ---
* R1: 1 kΩ resistor (Current limiting)
* Connects VIN to VOUT
R1 VIN VOUT 1k

* R2: 10 kΩ resistor (Load)
* Connects VOUT to Ground (0)
R2 VOUT 0 10k

* --- Diodes ---
* Chain of 3 diodes in series, connected in parallel with the load (R2).
* This clamps VOUT to approximately 3 * 0.7V = 2.1V.

* D1: 1N4148 Silicon Diode
* Anode -> VOUT, Cathode -> N1
D1 VOUT N1 1N4148

* D2: 1N4148 Silicon Diode
* Anode -> N1, Cathode -> N2
D2 N1 N2 1N4148

* D3: 1N4148 Silicon Diode
* Anode -> N2, Cathode -> Ground (0)
D3 N2 0 1N4148

* --- Models ---
* Standard model for 1N4148 small signal diode
.model 1N4148 D (IS=2.682n N=1.836 RS=0.5664 BV=100 IBV=20n CJO=4p TT=11.54n)

* --- Simulation Directives ---
* Perform a transient analysis for 10ms (matching the input ramp duration)
* Step size 10us
.tran 10u 10m

* Calculate DC operating point
.op

* Output data for plotting/logging
.print tran V(VIN) V(VOUT) V(N1) V(N2)

.end

Simulation Results (Transient Analysis)

Show raw data table (2016 rows)

Index   time            v(vin)          v(vout)         v(n1)
0	0.000000e+00	0.000000e+00	-9.87864e-23	2.810146e-18
1	1.000000e-07	9.000000e-05	8.083682e-05	5.389121e-05
2	2.000000e-07	1.800000e-04	1.626418e-04	1.084279e-04
3	4.000000e-07	3.600000e-04	3.262751e-04	2.175167e-04
4	8.000000e-07	7.200000e-04	6.535424e-04	4.356949e-04
5	1.600000e-06	1.440000e-03	1.308076e-03	8.720508e-04
6	3.200000e-06	2.880000e-03	2.617144e-03	1.744763e-03
7	6.400000e-06	5.760000e-03	5.235279e-03	3.490186e-03
8	1.280000e-05	1.152000e-02	1.047155e-02	6.981032e-03
9	2.280000e-05	2.052000e-02	1.865321e-02	1.243547e-02
10	3.280000e-05	2.952000e-02	2.683486e-02	1.788991e-02
11	4.280000e-05	3.852000e-02	3.501650e-02	2.334434e-02
12	5.280000e-05	4.752000e-02	4.319814e-02	2.879876e-02
13	6.280000e-05	5.652000e-02	5.137976e-02	3.425317e-02
14	7.280000e-05	6.552000e-02	5.956137e-02	3.970758e-02
15	8.280000e-05	7.452000e-02	6.774297e-02	4.516198e-02
16	9.280000e-05	8.352000e-02	7.592455e-02	5.061637e-02
17	1.028000e-04	9.252000e-02	8.410612e-02	5.607075e-02
18	1.128000e-04	1.015200e-01	9.228768e-02	6.152512e-02
19	1.228000e-04	1.105200e-01	1.004692e-01	6.697948e-02
20	1.328000e-04	1.195200e-01	1.086507e-01	7.243383e-02
21	1.428000e-04	1.285200e-01	1.168323e-01	7.788817e-02
22	1.528000e-04	1.375200e-01	1.250137e-01	8.334250e-02
23	1.628000e-04	1.465200e-01	1.331952e-01	8.879681e-02
... (1992 more rows) ...

Common mistakes and how to avoid them

1. Reversing diode polarity: If diodes are connected Cathode-to-Anode (facing up towards positive), they will not conduct in forward bias. Solution: Ensure the band (Cathode) of D3 connects to Ground, and the arrows point from VOUT to Ground.
2. Omitting R1: Connecting the source directly to the diode string without R1 causes a short circuit when V1 > 2.1 V, likely destroying the diodes. Solution: Always include a series resistor (R1) to drop the excess voltage.
3. Using a low resistance load (R2): If R2 is very small (e.g., 100 Ω), it will dominate the circuit and reduce VOUT below the clamping threshold purely by voltage division. Solution: Ensure the load R2 is significantly larger than R1 (at least 10x larger) for sharp clamping action.

Troubleshooting

• Symptom: VOUT equals VIN for the entire 0-9 V range.
  • Cause: The diode path is open.
  • Fix: Check for loose connections in the D1-D2-D3 string or a backwards diode blocking current.
• Symptom: VOUT stays near 0 V even when VIN is increased.
  • Cause: Diodes are shorted or one diode is reversed and connected in parallel with the supply incorrectly (though R1 usually protects this).
  • Fix: Check diode orientation. If a diode is reversed parallel to the load, it clamps at -0.7 V (essentially 0 V in this setup).
• Symptom: The clamping voltage is ~0.7 V or ~1.4 V instead of ~2.1 V.
  • Cause: One or two diodes are shorted or bypassed.
  • Fix: Verify that exactly three healthy diodes are in the series string.

Possible improvements and extensions

1. Adjustable Clamp: Replace the fixed D1-D3 string with a Zener diode (e.g., 3.3 V or 5.1 V) to set a specific protection voltage with a single component.
2. Visual Indication: Replace one of the standard diodes with a red LED. The clamp voltage will rise (LEDs drop ~1.8 V – 2.0 V), and the LED will light up when the input voltage exceeds the limit, acting as an «Overvoltage Warning.»

More Practical Cases on Prometeo.blog

Carlos Núñez Zorrilla

Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

Follow me:

Who we are

Level: Basic – Demonstrate how a diode protects a sensitive circuit (like a DC motor) if the battery is connected backwards.

Objective and use case

In this practical case, you will build a safety circuit that allows current to flow to a load (a DC motor) only when the battery is connected with the correct polarity.

• Prevents damage to components: Essential for protecting polarized components like electrolytic capacitors and microcontrollers from exploding or burning out.
• Automotive applications: Used in car electronics (ECUs, radios) to prevent damage if the car battery is installed incorrectly.
• Consumer electronics: Protects toys and handheld devices where users might insert batteries backwards.

Expected outcome:
* Correct Polarity: The motor spins, and the voltage at the load is approximately 0.7 V lower than the battery voltage.
* Reverse Polarity: The motor remains completely off (0 V at the load), ensuring no reverse current damages the device.
* Voltage Drop: Measurement of the characteristic forward voltage drop (~0.6 V to 0.7 V) across the silicon diode.

Target audience: Hobbyists and basic electronics students.

Materials

• V1: 9 V Battery or DC Power Supply, function: Main energy source.
• D1: 1N4007 Rectifier Diode, function: Blocks current flow in reverse direction.
• M1: 9 V DC Hobby Motor, function: The sensitive load being protected.
• S1: SPST Toggle Switch (Optional), function: Master ON/OFF control.

Wiring guide

This circuit puts the diode in series with the positive rail of the power supply.

• V1 (Positive Terminal) connects to node BAT_POS.
• V1 (Negative Terminal) connects to node 0 (GND).
• S1 (if used) connects between BAT_POS and node SWITCHED_POS. (If not used, connect BAT_POS directly to SWITCHED_POS).
• D1 (Anode) connects to node SWITCHED_POS.
• D1 (Cathode) connects to node LOAD_IN. (The striped band on the physical component marks the cathode).
• M1 (Positive Terminal) connects to node LOAD_IN.
• M1 (Negative Terminal) connects to node 0 (GND).

Conceptual block diagram

Schematic

[ POWER SOURCE ]              [ LOGIC / PROTECTION ]                 [ OUTPUT LOAD ]

+---------------------+       +-----------+        +--------------+       +--------------+
|   9 V Battery (V1)   |       | Switch S1 |        |   Diode D1   |       |   Motor M1   |
|      (Positive)     |------>|  (SPST)   |------->|   (1N4007)   |------>|   (9 V DC)    |-----> [ GND ]
+---------------------+   ^   +-----------+    ^   | Anode->Cath  |   ^   +--------------+
                          |                    |   +--------------+   |
                      (BAT_POS)          (SWITCHED_POS)           (LOAD_IN)

Electrical diagram

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Measurements and tests

To validate the protection, perform the following steps using a multimeter:

1. Forward Bias Test (Normal Operation):

   • Connect V1 correctly (Positive to Anode side).
   • Observe: The motor M1 spins.
   • Measure: Place the red probe on LOAD_IN and the black probe on 0 (GND). Expect a reading of approx. 8.3 V to 8.4 V (9 V input minus the diode drop).

2. Diode Drop Measurement:

   • With the circuit powered ON, place probes across D1 (Red on SWITCHED_POS, Black on LOAD_IN).
   • Result: You should read approximately 0.6 V to 0.7 V. This confirms the diode is conducting.

3. Reverse Bias Test (Simulation of Error):

   • Disconnect V1 and reverse the connections (Positive to GND, Negative to the input of the switch/diode).
   • Observe: The motor M1 does not spin. It is completely safe.
   • Measure: Place the red probe on LOAD_IN and the black probe on the battery negative (now at the top). The reading should be 0 V. Current is blocked.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* TITLE: Practical case: Reverse polarity protection

* --- Bill of Materials & Component Models ---

* V1: 9 V Battery or DC Power Supply
* Function: Main energy source
* Connected between BAT_POS and GND (0)
V1 BAT_POS 0 DC 9

* S1: SPST Toggle Switch
* Function: Master ON/OFF control
* Connected between BAT_POS and SWITCHED_POS
* Modeled as a voltage-controlled switch driven by a stimulus source to simulate user action.
S1 BAT_POS SWITCHED_POS CTRL_NODE 0 SW_MODEL
.model SW_MODEL SW(Vt=2.5 Ron=0.1 Roff=100Meg)

* Stimulus for S1 (User pressing the switch)
* Switch is OPEN (0V) initially, closes (5V) at 100us.
V_S1_ACT CTRL_NODE 0 PULSE(0 5 100u 1u 1u 10m 20m)

* ... (truncated in public view) ...

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* TITLE: Practical case: Reverse polarity protection

* --- Bill of Materials & Component Models ---

* V1: 9 V Battery or DC Power Supply
* Function: Main energy source
* Connected between BAT_POS and GND (0)
V1 BAT_POS 0 DC 9

* S1: SPST Toggle Switch
* Function: Master ON/OFF control
* Connected between BAT_POS and SWITCHED_POS
* Modeled as a voltage-controlled switch driven by a stimulus source to simulate user action.
S1 BAT_POS SWITCHED_POS CTRL_NODE 0 SW_MODEL
.model SW_MODEL SW(Vt=2.5 Ron=0.1 Roff=100Meg)

* Stimulus for S1 (User pressing the switch)
* Switch is OPEN (0V) initially, closes (5V) at 100us.
V_S1_ACT CTRL_NODE 0 PULSE(0 5 100u 1u 1u 10m 20m)

* D1: 1N4007 Rectifier Diode
* Function: Blocks current flow in reverse direction
* Anode -> SWITCHED_POS, Cathode -> LOAD_IN
D1 SWITCHED_POS LOAD_IN D1N4007
* Standard generic model for 1N4007
.model D1N4007 D(IS=7.03n RS=0.034 N=1.8 BV=1000 IBV=5u CJO=10p VJ=0.7 M=0.5 TT=100n)

* M1: 9 V DC Hobby Motor
* Function: The sensitive load being protected
* Connected between LOAD_IN and GND (0)
* Modeled as a Series Resistor (winding resistance) and Inductor
R_M1 LOAD_IN M1_INTERNAL 45
L_M1 M1_INTERNAL 0 5m

* --- Analysis & Output Directives ---

* Transient analysis to observe the switch turning on and voltage drop across diode
.tran 10u 2m

* Print directives for ngspice batch mode
.print tran V(BAT_POS) V(SWITCHED_POS) V(LOAD_IN)

* Operating point analysis
.op

.end

Simulation Results (Transient Analysis)

Show raw data table (233 rows)

Index   time            v(bat_pos)      v(switched_pos) v(load_in)
0	0.000000e+00	9.000000e+00	1.216207e-01	3.995271e-06
1	1.000000e-07	9.000000e+00	1.216207e-01	3.995280e-06
2	2.000000e-07	9.000000e+00	1.216207e-01	3.995265e-06
3	4.000000e-07	9.000000e+00	1.216207e-01	3.995282e-06
4	8.000000e-07	9.000000e+00	1.216207e-01	3.995257e-06
5	1.600000e-06	9.000000e+00	1.216207e-01	3.995290e-06
6	3.200000e-06	9.000000e+00	1.216207e-01	3.995250e-06
7	6.400000e-06	9.000000e+00	1.216207e-01	3.995292e-06
8	1.280000e-05	9.000000e+00	1.216207e-01	3.995249e-06
9	2.280000e-05	9.000000e+00	1.216207e-01	3.995292e-06
10	3.280000e-05	9.000000e+00	1.216207e-01	3.995249e-06
11	4.280000e-05	9.000000e+00	1.216207e-01	3.995292e-06
12	5.280000e-05	9.000000e+00	1.216207e-01	3.995249e-06
13	6.280000e-05	9.000000e+00	1.216207e-01	3.995292e-06
14	7.280000e-05	9.000000e+00	1.216207e-01	3.995249e-06
15	8.280000e-05	9.000000e+00	1.216207e-01	3.995292e-06
16	9.280000e-05	9.000000e+00	1.216207e-01	3.995249e-06
17	1.000000e-04	9.000000e+00	1.216207e-01	3.995292e-06
18	1.001000e-04	9.000000e+00	1.216207e-01	3.995267e-06
19	1.002600e-04	9.000000e+00	1.216207e-01	3.995284e-06
20	1.003075e-04	9.000000e+00	1.216207e-01	3.995227e-06
21	1.003906e-04	9.000000e+00	1.216207e-01	3.995299e-06
22	1.004136e-04	9.000000e+00	1.216207e-01	3.995334e-06
23	1.004539e-04	9.000000e+00	1.216207e-01	3.995198e-06
... (209 more rows) ...

Common mistakes and how to avoid them

1. Installing the diode backwards: The circuit will not work even with the correct battery polarity. Always ensure the silver band (cathode) points toward the load (M1).
2. Using a signal diode for high loads: Using a small 1N4148 for a high-current motor may cause the diode to overheat and fail. Use a 1N400x series diode (1 A rating) for motors.
3. Ignoring voltage drop: Students often forget that the diode «eats» about 0.7 V. If your load requires exactly 9 V, supplying 9 V through a diode might result in under-performance (8.3 V).

Troubleshooting

• Symptom: Motor runs slower than expected.
  • Cause: The voltage drop across the diode reduces the effective voltage at the motor.
  • Fix: Increase the supply voltage slightly or use a Schottky diode.
• Symptom: Diode gets very hot.
  • Cause: The motor draws more current than the diode is rated for.
  • Fix: Check the motor’s current draw and replace D1 with a higher amperage diode (e.g., 1N5408 for 3 A).
• Symptom: Motor works in both battery orientations.
  • Cause: The diode has failed short (internal damage) or is bypassed by a wire.
  • Fix: Test the diode with the «Diode Check» function on a multimeter; replace if it conducts in both directions.

Possible improvements and extensions

1. Schottky Diode Upgrade: Replace the 1N4007 with a 1N5817 (Schottky). Measure the voltage drop again; it should be lower (~0.3 V), making the circuit more efficient.
2. Full Bridge Rectifier: Replace the single diode with a bridge rectifier consisting of 4 diodes. This allows the device to work regardless of polarity (auto-correction) rather than just blocking the wrong polarity.

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Carlos Núñez Zorrilla

Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

Follow me:

Who we are

Level: Basic. Visualizing how a diode converts AC to pulsating DC by removing the negative half-cycle.

Objective and use case

You will build a fundamental analog circuit that uses a single semiconductor diode to block the negative portion of an alternating current (AC) signal, passing only the positive portion to a resistive load.

Why it is useful:
* Power conversion: It represents the first stage in converting AC mains power to DC for electronic devices.
* Signal demodulation: Used in AM radios to extract audio signals from radio frequency carriers (envelope detector).
* Polarity protection: Similar logic prevents damage to DC circuits if batteries are inserted backward.

Expected outcome:
* Input Signal: A complete sine wave swinging between positive and negative voltages (e.g., +10 V to -10 V).
* Output Signal: A pulsating waveform showing only the positive «humps» of the sine wave; the voltage sits at 0 V during the negative cycle.
* Voltage Drop: The peak output voltage will be approximately 0.7 V lower than the input peak due to the silicon diode forward voltage drop.
* Frequency: The output frequency remains identical to the input frequency.

Target audience and level: Students and hobbyists learning basic analog components.

Materials

• V1: 10 V (peak), 60 Hz AC voltage source (sine wave), function: main power input.
• D1: 1N4007 (or 1N4148), function: rectifier diode.
• R1: 1 kΩ resistor, function: resistive load.

Wiring guide

This guide defines the connections between components using specific node names (VIN, VOUT, 0).

• V1 (Source): Connect the positive terminal to node VIN and the negative terminal to node 0 (GND).
• D1 (Diode): Connect the Anode to node VIN and the Cathode (marked with a stripe) to node VOUT.
• R1 (Load): Connect one terminal to node VOUT and the other terminal to node 0 (GND).

Conceptual block diagram

Schematic

[ SOURCE / INPUT ]             [ RECTIFICATION ]               [ LOAD / OUTPUT ]

[ V1: AC Source    ]           +----------------------+           [ R1: Resistor   ]
[ 10 V Peak, 60Hz   ] --(VIN)-->| Anode (A) -> Cathode | --(VOUT)--> [ 1 kΩ         ] --> GND
                               | D1: 1N4007           |
                               +----------------------+

Electrical diagram

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Measurements and tests

To validate the circuit, you will need a dual-channel oscilloscope or a simulation tool.

1. Setup Probes:
   • Connect Channel A (Yellow) to VIN to monitor the source.
   • Connect Channel B (Blue) to VOUT to monitor the voltage across the resistor.
   • Ensure the ground clips of both probes are connected to node 0 (GND).
2. Visual Inspection:
   • Observe that VIN is a full sine wave centered at 0 V.
   • Observe that VOUT follows VIN during the positive cycle but stays flat at 0 V during the negative cycle.
3. Cursor Measurement:
   • Measure the peak voltage of VIN (e.g., 10.0 V).
   • Measure the peak voltage of VOUT. It should be approximately 9.3 V.
   • Calculate the difference (Vin – Vout). This confirms the roughly 0.7 V forward voltage drop of the silicon diode.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: Simple half-wave rectification

* --- Circuit Description ---
* V1 (Source): 10V Peak, 60Hz Sine Wave
* D1 (Diode): 1N4007 Rectifier
* R1 (Load): 1k Ohm Resistor

* --- Components ---

* V1: Main power input
* Connected: Positive -> VIN, Negative -> 0 (GND)
* Syntax: SIN(Voffset Vamp Freq)
V1 VIN 0 SIN(0 10 60)

* D1: Rectifier diode (1N4007)
* Connected: Anode -> VIN, Cathode -> VOUT
D1 VIN VOUT 1N4007

* R1: Resistive load
* Connected: VOUT -> 0 (GND)
* ... (truncated in public view) ...

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* Practical case: Simple half-wave rectification

* --- Circuit Description ---
* V1 (Source): 10V Peak, 60Hz Sine Wave
* D1 (Diode): 1N4007 Rectifier
* R1 (Load): 1k Ohm Resistor

* --- Components ---

* V1: Main power input
* Connected: Positive -> VIN, Negative -> 0 (GND)
* Syntax: SIN(Voffset Vamp Freq)
V1 VIN 0 SIN(0 10 60)

* D1: Rectifier diode (1N4007)
* Connected: Anode -> VIN, Cathode -> VOUT
D1 VIN VOUT 1N4007

* R1: Resistive load
* Connected: VOUT -> 0 (GND)
R1 VOUT 0 1k

* --- Models ---
* Standard model for 1N4007 Diode
.model 1N4007 D (IS=7.69n RS=0.042 N=1.45 BV=1000 IBV=5u CJO=14.2p VJ=0.5 M=0.333 TT=4.32u)

* --- Analysis Commands ---
* Transient analysis
* Frequency is 60Hz (Period ~16.67ms).
* Simulate for 50ms to capture approximately 3 full cycles.
.tran 0.1ms 50ms

* Operating Point for initial check
.op

* --- Output Directives ---
* Print input voltage and rectified output voltage
.print tran V(VIN) V(VOUT)

.end

Simulation Results (Transient Analysis)

Show raw data table (515 rows)

Index   time            v(vin)          v(vout)
0	0.000000e+00	0.000000e+00	-2.01593e-21
1	1.000000e-06	3.769911e-03	5.704546e-05
2	2.000000e-06	7.539822e-03	5.927562e-05
3	4.000000e-06	1.507964e-02	6.305993e-05
4	8.000000e-06	3.015924e-02	7.111847e-05
5	1.600000e-05	6.031821e-02	1.021853e-04
6	3.200000e-05	1.206342e-01	3.070797e-04
7	5.378437e-05	2.027484e-01	2.167324e-03
8	7.424258e-05	2.798514e-01	1.250260e-02
9	9.741093e-05	3.671480e-01	4.715921e-02
10	1.262516e-04	4.757778e-01	1.182339e-01
11	1.839330e-04	6.928557e-01	2.983890e-01
12	2.467131e-04	9.287461e-01	5.130162e-01
13	3.467131e-04	1.303359e+00	8.676123e-01
14	4.467131e-04	1.676120e+00	1.226655e+00
15	5.467131e-04	2.046499e+00	1.587509e+00
16	6.467131e-04	2.413969e+00	1.947514e+00
17	7.467131e-04	2.778010e+00	2.305173e+00
18	8.467131e-04	3.138102e+00	2.659882e+00
19	9.467131e-04	3.493735e+00	3.010809e+00
20	1.046713e-03	3.844404e+00	3.357375e+00
21	1.146713e-03	4.189609e+00	3.698904e+00
22	1.246713e-03	4.528861e+00	4.034877e+00
23	1.346713e-03	4.861677e+00	4.364712e+00
... (491 more rows) ...

Common mistakes and how to avoid them

1. Reversing the diode:
   • Error: The diode is installed with the cathode pointing toward the source.
   • Result: The circuit produces negative voltage pulses instead of positive ones.
   • Solution: Verify the stripe (cathode) points toward the load resistor.
2. Ignoring power ratings:
   • Error: Using a very small resistor (e.g., 10 Ω) with a standard 1/4W resistor.
   • Result: The resistor overheats and burns.
   • Solution: Calculate power (P = V^2 / R) or use a resistor value like 1 kΩ or higher for demonstration purposes.
3. Floating Ground:
   • Error: Measuring VOUT without a common ground reference between the source and the oscilloscope.
   • Result: Noisy or floating signals on the screen.
   • Solution: Ensure all grounds (Source, Resistor, Oscilloscope) are tied to node 0.

Troubleshooting

• Symptom: No output voltage (0 V flatline).
  • Cause: Diode is open (blown) or disconnected.
  • Fix: Check continuity with a multimeter; replace the diode.
• Symptom: Output is identical to Input (full sine wave).
  • Cause: Diode is shorted internally.
  • Fix: Replace the diode; a shorted diode acts like a wire.
• Symptom: Output peak is significantly lower than expected (e.g., 5 V drop).
  • Cause: High internal resistance of the source or an incorrect component (e.g., using a Zener diode in reverse breakdown).
  • Fix: Verify the diode part number is a standard rectifier (1N400x series).

Possible improvements and extensions

1. Filter Capacitor: Connect a capacitor (e.g., 10 µF) in parallel with R1 to observe how the capacitor fills in the gaps between pulses, smoothing the DC output.
2. Full-Wave Bridge: Replace the single diode with four diodes (bridge configuration) to utilize both the positive and negative halves of the AC cycle, improving efficiency.

More Practical Cases on Prometeo.blog

Carlos Núñez Zorrilla

Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

Follow me:

Who we are

Level: Basic. Verify the diode’s behavior as a unidirectional switch by measuring current and voltage in both polarities.

Objective and use case

In this experiment, you will build a simple series circuit consisting of a DC voltage source, a current-limiting resistor, and a silicon diode. You will measure the voltage drop across the diode and the current flowing through the circuit to confirm how the component blocks or conducts electricity based on its orientation.

• Reverse polarity protection: Prevents damage to sensitive electronics if a battery is inserted backwards.
• AC to DC Rectification: Converts alternating current into direct current in power supplies.
• Signal clipping: Limits voltage levels to protect downstream components in communication circuits.
• Logic implementation: Forms the basis of DTL (Diode-Transistor Logic) gates.

Expected outcome:
* Forward Bias: The diode conducts current; voltage across the diode (VD) stays near 0.7 V.
* Reverse Bias: The diode blocks current (I ≈ 0 A); voltage across the diode equals the supply voltage (Vsupply).
* Unidirectional flow: Confirmation that electrons only flow effectively in one direction (Anode to Cathode).

Target audience: Students and beginners in basic analog electronics.

Materials

• V1: 9 V DC supply (battery or bench power supply).
• R1: 1 kΩ resistor, function: current limiting and current sensing.
• D1: 1N4148 silicon diode (or 1N4007), function: Device Under Test (DUT).
• Multimeter: Digital multimeter, function: measuring DC voltage and DC current.

Wiring guide

This guide describes the Forward Bias configuration. The nodes are defined as VCC (9 V), N1 (junction), and 0 (GND).

• V1: Connect the positive terminal to node VCC and the negative terminal to node 0.
• R1: Connect one leg to node VCC and the other leg to node N1.
• D1: Connect the Anode (side without the stripe) to node N1 and the Cathode (side with the stripe) to node 0.

Conceptual block diagram

Schematic

[ POWER SOURCE ]               [ CIRCUIT PROCESSING ]                [ RETURN PATH ]

[ V1: 9 V DC Supply ] --(+9 V)--> [ R1: 1 kΩ Resistor ] --(Node N1)--> [ D1: 1N4148 Diode ] --(0 V)--> [ GND ]
                                (Current Limiting)    (Measurement)    (Anode -> Cathode)
                                                                        (Forward Biased)

Electrical diagram

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Measurements and tests

To validate the diode behavior, perform the following measurements using the multimeter.

1. Forward Bias Test (Anode to Positive)
* Voltage Measurement (VD): Set the multimeter to DC Volts. Place the red probe on the Anode (Node N1) and the black probe on the Cathode (Node 0).
* Result: You should read approximately 0.6 V to 0.7 V.
* Current Measurement (ID): Set the multimeter to DC mA. Break the circuit between R1 and D1, and insert the multimeter in series.
* Result: Using Ohm’s Law (I = (Vsource – VD) / R1), the current should be approximately 8.3 mA.

2. Reverse Bias Test (Cathode to Positive)
* Re-wiring: Disconnect D1, flip it 180 degrees, and reconnect it. Now the Cathode (stripe) connects to N1 and the Anode connects to 0.
* Voltage Measurement (VD): Measure across the diode again.
* Result: You should read a value very close to the source voltage (9 V), indicating the diode is acting as an open switch.
* Current Measurement (ID): Measure the current in the loop.
* Result: The reading should be 0 mA (or negligible leakage current in the nano-amp range).

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: Forward and Reverse Diode Biasing
* Based on Wiring Guide: Forward Bias Configuration

* --- Power Supply ---
* V1: 9 V DC supply connected between VCC and GND (Node 0)
V1 VCC 0 DC 9

* --- Components ---
* R1: 1 kΩ resistor between VCC and Node N1
R1 VCC N1 1k

* D1: 1N4148 Diode
* Anode connected to N1, Cathode connected to GND (0)
D1 N1 0 D1N4148

* --- Models ---
* Standard 1N4148 Model
.model D1N4148 D (IS=2.682n N=1.836 RS=0.5664 BV=100 IBV=100p CJO=4p TT=11.54n)

* --- Analysis Directives ---
* ... (truncated in public view) ...

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* Practical case: Forward and Reverse Diode Biasing
* Based on Wiring Guide: Forward Bias Configuration

* --- Power Supply ---
* V1: 9 V DC supply connected between VCC and GND (Node 0)
V1 VCC 0 DC 9

* --- Components ---
* R1: 1 kΩ resistor between VCC and Node N1
R1 VCC N1 1k

* D1: 1N4148 Diode
* Anode connected to N1, Cathode connected to GND (0)
D1 N1 0 D1N4148

* --- Models ---
* Standard 1N4148 Model
.model D1N4148 D (IS=2.682n N=1.836 RS=0.5664 BV=100 IBV=100p CJO=4p TT=11.54n)

* --- Analysis Directives ---
* Operating Point analysis to see DC bias values
.op

* Transient analysis to log data (1ms duration)
.tran 10u 1m

* --- Output Directives ---
* Print supply voltage and diode forward voltage
.print tran V(VCC) V(N1)

.end

Simulation Results (Transient Analysis)

Show raw data table (108 rows)

Index   time            v(vcc)          v(n1)
0	0.000000e+00	9.000000e+00	7.143329e-01
1	1.000000e-07	9.000000e+00	7.143290e-01
2	2.000000e-07	9.000000e+00	7.143286e-01
3	4.000000e-07	9.000000e+00	7.143286e-01
4	8.000000e-07	9.000000e+00	7.143286e-01
5	1.600000e-06	9.000000e+00	7.143286e-01
6	3.200000e-06	9.000000e+00	7.143286e-01
7	6.400000e-06	9.000000e+00	7.143286e-01
8	1.280000e-05	9.000000e+00	7.143286e-01
9	2.280000e-05	9.000000e+00	7.143286e-01
10	3.280000e-05	9.000000e+00	7.143286e-01
11	4.280000e-05	9.000000e+00	7.143286e-01
12	5.280000e-05	9.000000e+00	7.143286e-01
13	6.280000e-05	9.000000e+00	7.143286e-01
14	7.280000e-05	9.000000e+00	7.143286e-01
15	8.280000e-05	9.000000e+00	7.143286e-01
16	9.280000e-05	9.000000e+00	7.143286e-01
17	1.028000e-04	9.000000e+00	7.143286e-01
18	1.128000e-04	9.000000e+00	7.143286e-01
19	1.228000e-04	9.000000e+00	7.143286e-01
20	1.328000e-04	9.000000e+00	7.143286e-01
21	1.428000e-04	9.000000e+00	7.143286e-01
22	1.528000e-04	9.000000e+00	7.143286e-01
23	1.628000e-04	9.000000e+00	7.143286e-01
... (84 more rows) ...

Common mistakes and how to avoid them

• Measuring current in parallel: Never connect the multimeter across the diode while in «Current/Amps» mode. This creates a short circuit and may blow the multimeter’s fuse. Always measure current in series.
• Omitting the resistor: Connecting a diode directly to a voltage source (above 0.7 V) without a resistor will cause unlimited current flow, instantly destroying the diode (and potentially the power supply).
• Misidentifying terminals: The stripe on the diode body indicates the Cathode. In forward bias, the Cathode must point toward the lower potential (GND).

Troubleshooting

• 0 V measured across D1 in Forward Bias: The diode might be shorted internally or the power supply is off. Check V1 voltage first.
• 0 mA in Forward Bias: The circuit is open. Check if the breadboard connections are loose or if the resistor value is too high (e.g., 1 MΩ instead of 1 kΩ).
• 9 V across R1 in Reverse Bias: The diode is conducting when it should not. Ensure D1 is actually reversed (stripe facing positive voltage) or check if D1 is damaged (shorted).
• Diode gets hot: The current is too high. Ensure R1 is at least 330 Ω for a 9 V supply.

Possible improvements and extensions

• Visual Indicator: Replace the standard silicon diode (D1) with an LED. The light will visually confirm when current is flowing (Forward Bias) and turn off when blocked (Reverse Bias).
• I-V Curve Tracing: Use a variable power supply (0 V to 10 V) and record the current at 0.1 V steps to plot the characteristic exponential curve of the diode.

More Practical Cases on Prometeo.blog

Carlos Núñez Zorrilla

Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

Follow me:

Who we are

Level: Medium
Design a circuit that decreases LED backlight intensity as ambient light increases.

Objective and use case

In this practical case, you will build a PWM (Pulse Width Modulation) controller using a 555 timer and a photoresistor (LDR). The circuit will automatically adjust the duty cycle of the output signal based on ambient light levels, driving a power MOSFET to dim an LED strip.

Why it is useful:
* Energy Efficiency: Reduces power consumption in high-brightness environments where backlights might be less visible or needed (depending on display type).
* Automatic Night-Lights: Useful for systems that need to be dim during the day and bright at night (if logic is inverted) or vice-versa.
* Human Vision Comfort: Prevents glare by adjusting light intensity dynamically.
* Instrumentation: Often used in automotive dashboards or control panels.

Expected outcome:
* Signal Generation: A square wave output at pin 3 of the 555 timer.
* Inverse Response: When the LDR is exposed to strong light (Flashlight), the LED brightness decreases.
* Dark Response: When the LDR is covered (Darkness), the LED brightness increases to maximum.
* Target Audience: Intermediate electronics students and hobbyists.

Materials

• V1: 9 V DC voltage source, function: Main circuit power.
• R1: Photoresistor (LDR), function: Light sensor (Charge path).
• R2: 10 kΩ resistor, function: Discharge path timing.
• R3: 1 kΩ resistor, function: MOSFET Gate protection.
• R4: 330 Ω resistor, function: LED current limiting.
• C1: 100 nF capacitor, function: PWM timing capacitor.
• C2: 10 nF capacitor, function: Control voltage noise filtering.
• D1: 1N4148 diode, function: Steering diode for Charge path.
• D2: 1N4148 diode, function: Steering diode for Discharge path.
• D3: High-brightness White LED, function: Simulated Backlight.
• Q1: 2N7000 (N-Channel MOSFET), function: LED driver switch.
• U1: NE555 Precision Timer, function: PWM generator.

Wiring guide

This guide uses specific node names (VCC, 0, V_TRIG, V_GATE, etc.) to help you verify connections.

• Power Supply:
• Connect V1 positive terminal to node VCC.
• Connect V1 negative terminal to node 0 (GND).
• 555 Timer Power & Reset (U1):
• Connect U1 pin 8 (VCC) to node VCC.
• Connect U1 pin 1 (GND) to node 0.
• Connect U1 pin 4 (Reset) to node VCC.
• Timing Network (The PWM Core):
• Connect R1 (LDR) between node VCC and node V_CHARGE.
• Connect D1 (Anode) to V_CHARGE and D1 (Cathode) to node V_TIMING.
• Connect D2 (Anode) to node V_TIMING and D2 (Cathode) to node V_DISCHARGE.
• Connect R2 between node V_DISCHARGE and U1 pin 7 (Discharge).
• Connect C1 between node V_TIMING and node 0.
• Connect U1 pin 2 (Trigger) to node V_TIMING.
• Connect U1 pin 6 (Threshold) to node V_TIMING.
• Control Voltage:
• Connect C2 between U1 pin 5 (CV) and node 0.
• Output Stage:
• Connect R3 between U1 pin 3 (Output) and node V_GATE.
• Connect Q1 Gate to node V_GATE.
• Connect Q1 Source to node 0.
• Connect Q1 Drain to node V_LED_CATHODE.
• Load (Backlight):
• Connect R4 between node VCC and node V_LED_ANODE.
• Connect D3 Anode to node V_LED_ANODE.
• Connect D3 Cathode to node V_LED_CATHODE.

Conceptual block diagram

Schematic

Title: Practical case: Adaptive Screen Brightness Regulator

      [ INPUTS / TIMING NETWORK ]              [ LOGIC / CONTROL ]                 [ OUTPUT STAGE ]

[ V1: 9 V Source ] --(Power VCC)--------->+-----------------------+
                                         |                       |
(Light) -> [ R1: LDR ] --(Charge)------->|                       |
                                         |       U1: NE555       |
[ D1, D2, R2 ] --(Steering/Disch)------->|    (PWM Generator)    |--(Pin 3)--> [ R3: 1k ] --> [ Q1: MOSFET ]
                                         |                       |                                  |
[ C1: 100nF ] --(Timing Ramp)----------->|  Pins 2,6 (Trig/Thr)  |                                  |
                                         |  Pin 7 (Discharge)    |                           (Switches GND)
[ C2: 10nF ] --(Filter)----------------->|  Pin 5 (Ctrl Volt)    |                                  |
                                         |                       |                                  v
                                         +-----------------------+                       [ D3: LED + R4: 330R ]
                                                                                              (Backlight)

Electrical diagram

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Measurements and tests

Perform these steps to validate the «Inverse» behavior (More light = Less Brightness).

1. Baseline Check (Ambient Light):
   • Power the circuit with 9 V.
   • Observe the LED D3. It should be illuminated at a moderate level.
   • Measure voltage at V_GATE using an oscilloscope. You should see a square wave.
2. High Light Test:
   • Shine a flashlight directly onto R1 (LDR).
   • Observation: The LED D3 should dim significantly or turn off.
   • Measurement: Check the duty cycle at V_GATE. Since the LDR resistance drops, the capacitor charges very quickly (short Ton) relative to the fixed discharge time (Toff). The Duty Cycle (Ton / Ttotal) decreases.
3. Low Light Test:
   • Cover R1 (LDR) with your hand or a black cap.
   • Observation: The LED D3 should reach maximum brightness.
   • Measurement: The LDR resistance increases, making the charge time (Ton) much longer. The Duty Cycle increases towards 100%.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: Adaptive Screen Brightness Regulator

* --- Power Supply ---
V1 VCC 0 DC 9

* --- Input Stage (Light Sensor) ---
R1 VCC V_CHARGE 20k

* --- PWM Timing Network ---
D1 V_CHARGE V_TIMING D1N4148
D2 V_TIMING V_DISCHARGE D1N4148
R2 V_DISCHARGE V_DISCH_PIN 10k
C1 V_TIMING 0 100n

* --- Control & Processing ---
* U1: NE555 Precision Timer
XU1 0 V_TIMING V_OUT_PIN VCC V_CV V_TIMING V_DISCH_PIN VCC NE555

* Control Voltage noise filtering
C2 V_CV 0 10n
* ... (truncated in public view) ...

Copy this content into a .cir file and run with ngspice.

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🔓 See premium access plans

* Practical case: Adaptive Screen Brightness Regulator

* --- Power Supply ---
V1 VCC 0 DC 9

* --- Input Stage (Light Sensor) ---
R1 VCC V_CHARGE 20k

* --- PWM Timing Network ---
D1 V_CHARGE V_TIMING D1N4148
D2 V_TIMING V_DISCHARGE D1N4148
R2 V_DISCHARGE V_DISCH_PIN 10k
C1 V_TIMING 0 100n

* --- Control & Processing ---
* U1: NE555 Precision Timer
XU1 0 V_TIMING V_OUT_PIN VCC V_CV V_TIMING V_DISCH_PIN VCC NE555

* Control Voltage noise filtering
C2 V_CV 0 10n

* --- Output Driver Stage ---
R3 V_OUT_PIN V_GATE 1k

* Q1: N-Channel MOSFET
MQ1 V_LED_CATHODE V_GATE 0 0 2N7000

* --- Load (Backlight) ---
R4 VCC V_LED_ANODE 330
D3 V_LED_ANODE V_LED_CATHODE WHITE_LED

* --- Component Models ---
.model D1N4148 D (IS=2.682n N=1.836 RS=.5664 BV=100 IBV=100p CJO=4p TT=11.54n)
.model 2N7000 NMOS (Level=1 VTO=2.1 KP=0.5 Lambda=0.002 RD=1.5 RS=1.5 CGSO=10p CGDO=10p CGBO=10p)
.model WHITE_LED D (IS=1p N=5 RS=5 BV=5 IBV=10u CJO=50p)

* --- NE555 Behavioral Subcircuit ---
.subckt NE555 GND TRIG OUT RESET CV THRES DISCH VCC
    * Internal Voltage Divider
    R_div1 VCC CV 5k
    R_div2 CV TR 5k
    R_div3 TR GND 5k

    * Comparators (Sigmoid-based for smooth convergence)
    * Set Signal (Active High) when TRIG < 1/3 VCC (V_TR)
    B_set set_node 0 V = 2.5 + 2.5 * tanh(100 * (V(TR) - V(TRIG)))

    * Reset Signal Logic
    * Condition 1: THRES > CV
    B_c1 c1 0 V = 0.5 * (1 + tanh(100 * (V(THRES) - V(CV))))
    * Condition 2: RESET < 1.0V
    B_c2 c2 0 V = 0.5 * (1 + tanh(100 * (1.0 - V(RESET))))
    * Combine (Probabilistic OR logic): V_rst = c1 + c2 - c1*c2, scaled to 5V
    B_rst rst_node 0 V = 5 * (V(c1) + V(c2) - V(c1)*V(c2))

    * RC Delays to prevent algebraic loops in Flip-Flop
    R_sd set_node set_d 1k
    C_sd set_d 0 1p
    R_rd rst_node rst_d 1k
    C_rd rst_d 0 1p

    * SR Latch (Cross-coupled NOR logic with soft thresholds)
    * Q = ~(R | Qb)
    B_q  q_int  0 V = 5 / (1 + exp( 20 * (V(rst_d) + V(qb_int) - 2.5) ))
    * Qb = ~(S | Q)
    B_qb qb_int 0 V = 5 / (1 + exp( 20 * (V(set_d) + V(q_int) - 2.5) ))

    * Output Buffer
    E_out OUT_int 0 q_int 0 1
    R_out_prot OUT_int OUT 1

    * Discharge Transistor (Switch to GND when Qb is High / Output Low)
    S_disch DISCH 0 qb_int 0 SW_DISCH
    .model SW_DISCH SW(Vt=2.5 Ron=10 Roff=100Meg)
.ends

* --- Simulation Directives ---
.tran 10u 20m
.print tran V(V_TIMING) V(V_GATE) V(V_LED_CATHODE) V(V_LED_ANODE)
.op
.end

Simulation Results (Transient Analysis)

Show raw data table (4016 rows)

Index   time            v(v_timing)     v(v_gate)       v(v_led_cathode
0	0.000000e+00	3.183820e+00	9.643749e-22	8.709822e+00
1	1.000000e-07	3.183820e+00	9.643749e-22	8.709822e+00
2	2.000000e-07	3.183820e+00	-2.54330e-17	8.709822e+00
3	4.000000e-07	3.183820e+00	4.759196e-18	8.709822e+00
4	8.000000e-07	3.183820e+00	-5.90561e-18	8.709822e+00
5	1.600000e-06	3.183820e+00	1.843922e-17	8.709822e+00
6	3.200000e-06	3.183820e+00	4.911091e-18	8.709822e+00
7	6.400000e-06	3.183819e+00	9.652751e-18	8.709822e+00
8	1.280000e-05	3.183819e+00	-2.42211e-18	8.709822e+00
9	2.280000e-05	3.183818e+00	-2.25892e-17	8.709822e+00
10	3.280000e-05	3.183818e+00	-5.29878e-18	8.709822e+00
11	4.280000e-05	3.183817e+00	-8.38426e-18	8.709822e+00
12	5.280000e-05	3.183816e+00	-5.24090e-18	8.709822e+00
13	6.280000e-05	3.183815e+00	5.344924e-18	8.709822e+00
14	7.280000e-05	3.183815e+00	-6.20163e-18	8.709822e+00
15	8.280000e-05	3.183814e+00	-2.95146e-18	8.709822e+00
16	9.280000e-05	3.183813e+00	-1.95605e-17	8.709822e+00
17	1.028000e-04	3.183813e+00	5.833300e-18	8.709822e+00
18	1.128000e-04	3.183812e+00	-9.79628e-18	8.709822e+00
19	1.228000e-04	3.183812e+00	1.090495e-18	8.709822e+00
20	1.328000e-04	3.183811e+00	-1.79618e-17	8.709822e+00
21	1.428000e-04	3.183810e+00	6.632650e-18	8.709822e+00
22	1.528000e-04	3.183810e+00	-1.47697e-17	8.709822e+00
23	1.628000e-04	3.183809e+00	6.958764e-18	8.709822e+00
... (3992 more rows) ...

Common mistakes and how to avoid them

1. Reversing Steering Diodes (D1, D2):
   • Error: Placing D1 or D2 backwards prevents the capacitor from charging or discharging properly.
   • Solution: Ensure the black band (cathode) of D1 points towards the capacitor and the black band of D2 points towards Pin 7.
2. Connecting LDR to Pin 7 directly:
   • Error: Connecting the LDR without the steering diodes creates a standard astable oscillator where frequency changes drastically, but duty cycle control is less distinct.
   • Solution: Use the diode steering topology described to separate the Charge (LDR) and Discharge (R2) paths.
3. MOSFET Pinout Confusion:
   • Error: Swapping Drain and Source on the 2N7000.
   • Solution: Verify the datasheet. For 2N7000 (TO-92), looking at the flat side, pins are usually Source, Gate, Drain (left to right).

Troubleshooting

• Symptom: LED is always ON and does not change with light.
  • Cause: MOSFET Gate floating or Pin 3 stuck High.
  • Fix: Check R1 and C1 connections. Ensure Pin 2 and 6 are tied together.
• Symptom: LED is always OFF.
  • Cause: LDR resistance is too low (short circuit) or LED connected backwards.
  • Fix: Check LED polarity. Measure resistance of LDR in darkness; if it is 0 Ω, it is defective.
• Symptom: LED flickers visibly.
  • Cause: Frequency is too low.
  • Fix: Reduce the value of C1 (e.g., change from 100 nF to 10 nF) to increase the PWM frequency beyond human persistence of vision (> 100 Hz).

Possible improvements and extensions

1. Minimum Brightness Clamp: Add a fixed resistor in series with the LDR (R1). This ensures that even in extremely bright light (low LDR resistance), there is still a minimum charge time, preventing the LED from turning off completely.
2. Smoother Transition: Add a large capacitor across the LDR to filter out rapid changes in light (e.g., shadows from passing objects), creating a «fade» effect rather than an instant jump in brightness.

More Practical Cases on Prometeo.blog

Carlos Núñez Zorrilla

Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

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