Practical case: Current measurement with shunt

Current measurement with shunt prototype (Maker Style)

Level: Medium – Use a very low-value resistor to indirectly measure a DC load’s current via voltage drop.

Objective and use case

You will build a direct current (DC) circuit featuring a primary dummy load and a low-value series resistor, known as a shunt. By measuring the tiny voltage drop across this shunt, you will indirectly calculate the total current flowing through the circuit using Ohm’s Law.

Why this is useful:
* Safe high-current measurement: Avoids running massive currents directly through your multimeter’s internal, potentially fragile, circuitry.
* Continuous monitoring: Allows microcontrollers or analog panels to constantly track power consumption without breaking the circuit.
* Overcurrent protection: Provides a proportional voltage signal that can trigger a shutdown mechanism if the current exceeds safe limits.
* Lowering burden voltage: Customizing the shunt size minimizes the interference the measurement instrument imposes on the operating circuit.

Expected outcome:
* You will generate a measurable millivolt-range voltage drop across the low-side shunt resistor.
* You will correctly calculate the load current ($I = V/R$) from the observed voltage.
* You will verify the power dissipation (P = I^2 × R) of the shunt to ensure it operates within safe thermal limits.

Target audience and level: Intermediate electronics students learning indirect measurement techniques and power calculations.

Materials

  • V1: 12 V DC supply, function: main power source
  • R_LOAD: 24 Ω resistor (10 W), function: primary DC load
  • R_SHUNT: 1 Ω resistor (1 W), function: current sensing shunt
  • VM1: Digital Multimeter, function: measure voltage drop across shunt

Wiring guide

  • V1: connects positive terminal to node VCC and negative terminal to node 0 (GND).
  • R_LOAD: connects between node VCC and node SENSE.
  • R_SHUNT: connects between node SENSE and node 0 (GND).
  • VM1: connects positive probe to node SENSE and negative probe to node 0 (GND) to measure the voltage drop across the shunt.

Conceptual block diagram

Conceptual block diagram — Load & Shunt Resistor
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

[ V1: 12 V VCC ] --> [ R_LOAD: 24 Ω ] --(Node SENSE)--> [ R_SHUNT: 1 Ω ] --> GND
                                           |
                                           +--(+ probe)--> [ VM1: Multimeter ] --(- probe)--> GND
Electrical Schematic

Electrical diagram

Electrical diagram for current measurement with shunt
Generated from the validated SPICE netlist for this case.

🔒 This electrical diagram is premium. With the 7-day pass or the monthly membership you can unlock the complete didactic material and the print-ready PDF pack.🔓 See premium access plans

Measurements and tests

  1. Verify the power supply: Turn on V1 and measure the voltage at node VCC relative to node 0. It should read exactly 12 V.
  2. Measure the shunt voltage (Vshunt): Set your multimeter to the DC millivolts or volts range. Measure the voltage at node SENSE relative to node 0. With a 24 Ω load and a 1 Ω shunt (25 Ω total), you should measure approximately 480 mV (0.48 V).
  3. Calculate the current: Use Ohm’s law (I = Vshunt / Rshunt). Divide the 0.48 V measurement by 1 Ω. The total current flowing through the circuit is 480 mA (0.48 A).
  4. Calculate power dissipation: Calculate the power dissipated by the shunt using P = Vshunt × I. In this case, 0.48 V × 0.48 A = 0.23 W. Because we selected a 1 W resistor, it is operating safely within its limits.
  5. Measure load voltage drop: Measure the voltage between node VCC and node SENSE. It should be approximately 11.52 V, confirming that the shunt «steals» very little voltage from the primary load.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice)

* Practical case: Current measurement with shunt
.width out=256

* Main power source
V1 VCC 0 DC 12

* Primary DC load
R_LOAD VCC SENSE 24

* Current sensing shunt
R_SHUNT SENSE 0 1

* Simulation commands
.op
.tran 1u 100u

* Print the input voltage and the voltage drop across the shunt (VM1)
.print tran V(VCC) V(SENSE)

.end

Copy this content into a .cir file and run with ngspice.

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)

Analysis: The simulation shows a constant 12V supply at VCC and a constant 0.48V at the SENSE node. This perfectly matches the theoretical voltage divider calculation (12V * 1Ω / 25Ω = 0.48V), indicating a current of 0.48A.
Show raw data table (108 rows)
Index   time            v(vcc)          v(sense)
0	0.000000e+00	1.200000e+01	4.800000e-01
1	1.000000e-08	1.200000e+01	4.800000e-01
2	2.000000e-08	1.200000e+01	4.800000e-01
3	4.000000e-08	1.200000e+01	4.800000e-01
4	8.000000e-08	1.200000e+01	4.800000e-01
5	1.600000e-07	1.200000e+01	4.800000e-01
6	3.200000e-07	1.200000e+01	4.800000e-01
7	6.400000e-07	1.200000e+01	4.800000e-01
8	1.280000e-06	1.200000e+01	4.800000e-01
9	2.280000e-06	1.200000e+01	4.800000e-01
10	3.280000e-06	1.200000e+01	4.800000e-01
11	4.280000e-06	1.200000e+01	4.800000e-01
12	5.280000e-06	1.200000e+01	4.800000e-01
13	6.280000e-06	1.200000e+01	4.800000e-01
14	7.280000e-06	1.200000e+01	4.800000e-01
15	8.280000e-06	1.200000e+01	4.800000e-01
16	9.280000e-06	1.200000e+01	4.800000e-01
17	1.028000e-05	1.200000e+01	4.800000e-01
18	1.128000e-05	1.200000e+01	4.800000e-01
19	1.228000e-05	1.200000e+01	4.800000e-01
20	1.328000e-05	1.200000e+01	4.800000e-01
21	1.428000e-05	1.200000e+01	4.800000e-01
22	1.528000e-05	1.200000e+01	4.800000e-01
23	1.628000e-05	1.200000e+01	4.800000e-01
... (84 more rows) ...

Common mistakes and how to avoid them

  • Using a shunt with too much resistance: If the shunt value is too high (e.g., 100 Ω), it creates a massive «burden voltage,» starving the actual load of power and altering the circuit’s behavior. Always use low values (typically 1 Ω, 0.1 Ω, or even milliohms).
  • Ignoring the power rating of the shunt: A resistor dropping even a fraction of a volt can dissipate substantial heat if the current is high. Always calculate P = I^2 × R and select a resistor with double the calculated wattage rating.
  • Measuring current directly across the shunt: Setting the multimeter to «Amps» mode and putting it in parallel with the shunt will short out the shunt, potentially blowing the multimeter’s internal fuse. Always use the «Voltage» mode to measure the voltage drop across the shunt.

Troubleshooting

  • Symptom: Multimeter reads 0 V across the shunt.
    • Cause: The circuit is open; power isn’t reaching the load, or R_SHUNT is shorted out.
    • Fix: Check all wire continuity, ensure the power supply is turned on, and confirm the load is properly connected.
  • Symptom: The shunt resistor is smoking or gets dangerously hot.
    • Cause: The current exceeds the wattage rating of the shunt, or R_LOAD has been bypassed (creating a short circuit directly through the shunt).
    • Fix: Immediately turn off the power. Verify R_LOAD is not bypassed and replace the shunt with one of a higher wattage rating if necessary.
  • Symptom: The calculated current seems far lower than the expected load consumption.
    • Cause: The resistance of the connecting wires or breadboard contacts is acting as an unmeasured secondary shunt, adding to the total circuit resistance.
    • Fix: Ensure short, thick wires are used for power connections. Consider switching to a 4-wire (Kelvin) measurement setup for extreme precision.

Possible improvements and extensions

  • Add a current-sense amplifier: Connect an Operational Amplifier (Op-Amp) across R_SHUNT in a non-inverting configuration to amplify the small millivolt signal into a robust 0-5 V signal easily readable by a microcontroller’s ADC.
  • Implement high-side sensing: Move R_SHUNT to the «high side» (between VCC and R_LOAD). Use a dedicated high-side current sensing IC (such as the INA219) to measure the differential voltage, proving that current can be measured before it reaches the load while keeping the load strictly grounded.

More Practical Cases on Prometeo.blog

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Go to Amazon

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Quick Quiz

Question 1: What is the primary purpose of the low-value series resistor (shunt) in this circuit?




Question 2: Which formula is used to calculate the load current from the observed voltage drop across the shunt?




Question 3: How does using a shunt resistor help with safe high-current measurements?




Question 4: What is one benefit of using a shunt resistor for continuous monitoring?




Question 5: How can a shunt resistor assist in overcurrent protection?




Question 6: Why is customizing the shunt size important for the operating circuit?




Question 7: What range of voltage drop is expected across the low-side shunt resistor?




Question 8: What type of circuit is being built in this scenario?




Question 9: What is another name for the low-value series resistor used to measure current?




Question 10: What physical principle is used to calculate the total current flowing through the circuit in this setup?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

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Practical case: Base Biasing with Resistor

Base Biasing with Resistor prototype (Maker Style)

Level: Medium — Calculate and verify a base resistor to switch an NPN transistor safely from a logic output.

Objective and use case

You will build a simple transistor switch where a 5 V logic output drives an NPN transistor through a base resistor. The goal is to choose the resistor so the transistor turns the load on reliably without exceeding the allowed logic output current.

Why it is useful:
– To drive a relay module, buzzer, or small lamp from a microcontroller pin.
– To control loads that require more current than a logic output can supply directly.
– To protect a logic output from excessive base current.
– To learn how to verify transistor saturation with real voltage and current measurements.

Expected outcome:
– When the logic output is LOW, the transistor remains OFF and the load is de-energized.
– When the logic output is HIGH, the transistor turns ON and the load current is about 20 mA.
– Base current stays below the logic output limit, target about 4.3 mA.
– Measured base-emitter voltage is about 0.7 V when ON.
– Measured collector-emitter voltage is low in saturation, typically below 0.2 V.

Target audience and level: Students with basic DC circuit and transistor knowledge.

Materials

  • V1: 5 V DC supply
  • VSIG: 0 V / 5 V logic source, function: control signal for transistor base
  • R1: 1 kΩ resistor, function: base current limiting
  • R2: 150 Ω resistor, function: load current limiting for LED branch
  • D1: red LED, function: visible collector load indicator
  • Q1: 2N2222 NPN transistor, function: low-side switch
  • M1: digital multimeter, function: voltage and current measurements
  • M2: optional second multimeter, function: simultaneous current check

Wiring guide

Use these node names: VCC, 0, VIN, VB, VC.

  • V1 connects between VCC and 0.
  • VSIG connects between VIN and 0.
  • R1 connects between VIN and VB.
  • Q1 collector connects to VC.
  • Q1 base connects to VB.
  • Q1 emitter connects to 0.
  • R2 connects between VCC and the anode node of D1.
  • D1 anode connects to R2; D1 cathode connects to VC.

Practical design values:
– Load current target: about Ic = (5 V - 2.0 V - 0.2 V) / 150 Ω ≈ 18.7 mA
– Forced gain for saturation: use β_forced ≈ 10
– Required base current: Ib ≈ Ic / 10 ≈ 1.9 mA
– Base resistor estimate: R1 ≈ (5 V - 0.7 V) / 1.9 mA ≈ 2.26 kΩ

To make switching more robust, choose a lower standard value:
– Selected R1 = 1 kΩ
– Expected base current: Ib ≈ (5 V - 0.7 V) / 1 kΩ ≈ 4.3 mA

This value is suitable only if the logic output can safely source at least 4.3 mA.

Conceptual block diagram

Conceptual block diagram — Base-biased NPN switch
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

Practical case: Base Biasing with Resistor

Power / load path:
[ V1: 5 V DC Supply ] --(VCC)--> [ R2: 150 ohm ] --(LED current limit)--> [ D1: Red LED ] --(cathode at VC)--> [ Q1:C 2N2222 ]
[ Q1:C 2N2222 ] --(collector-emitter path)--> [ Q1:E 2N2222 ] --(0 / GND)--> [ V1: 0 V ]

Control / base path:
[ VSIG: 0/5 V Logic Source ] --(VIN)--> [ R1: 1 kohm ] --(VB)--> [ Q1:B 2N2222 ]
[ Q1:B 2N2222 ] --(base-emitter junction)--> [ Q1:E 2N2222 ] --(0 / GND)--> [ VSIG: 0 V ]

Node labels:
[ VIN ] --> [ R1 ] --> [ VB ] --> [ Q1:B ]
[ VCC ] --> [ R2 ] --> [ D1 Anode ]
[ D1 Cathode ] --> [ VC ] --> [ Q1:C ]
[ Q1:E ] --> [ 0 / GND ]

Optional measurements:
[ M1 DMM ] --(measure V_B or V_C vs 0)--> [ VB / VC ] --> [ 0 / GND ]
[ M2 DMM ] --(current mode, inserted in series where needed)--> [ Base path or Load path ]
Electrical Schematic

Electrical diagram

Electrical diagram for Practical case: Base biasing with resistor
Generated from the validated SPICE netlist for this case.

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Measurements and tests

  1. Power-off check
  2. Verify all connections before applying power.
  3. Confirm Q1 emitter goes to 0.
  4. Confirm R1 is in series between VIN and VB.

  5. OFF-state test

  6. Set VSIG = 0 V.
  7. Measure Vb from VB to 0: expected near 0 V.
  8. Measure Vce from VC to 0: expected near 5 V.
  9. Observe D1: it should be OFF.
  10. Measure Ib: expected approximately 0 mA.
  11. Measure Ic: expected approximately 0 mA.

  12. ON-state test

  13. Set VSIG = 5 V.
  14. Measure Vb: expected about 0.7 V.
  15. Measure Vbe: expected about 0.65 V to 0.8 V.
  16. Measure Ib by placing the meter in series with R1: expected about 4.3 mA.
  17. Measure Vc: expected low, typically below 0.2 V to 0.3 V.
  18. Measure Vce: expected below 0.2 V if saturation is achieved.
  19. Measure Ic in series with the collector path: expected about 18 mA to 20 mA.
  20. Observe D1: it should be clearly ON.

  21. Logic output safety check

  22. Compare the measured Ib with the maximum source current allowed by the logic output.
  23. If the logic output rating is less than the measured base current, increase R1.

  24. Verification calculation

  25. Compute measured gain in switching mode: Ic / Ib.
  26. Example with measured values: 19 mA / 4.3 mA ≈ 4.4
  27. This is consistent with saturated switching, where the transistor is intentionally overdriven.

  28. Pass criteria

  29. Ib does not exceed the logic output limit.
  30. D1 turns fully ON at logic HIGH and fully OFF at logic LOW.
  31. Vce in ON state is low enough to confirm saturation.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: Base Biasing with Resistor
.width out=256

V1 VCC 0 DC 5
VSIG VIN 0 PULSE(0 5 10m 1u 1u 245m 1s)

R1 VIN VB 1k
R2 VCC VLED 150
D1 VLED VC DRED
Q1 VC VB 0 Q2N2222

* Optional multimeter loading approximations (high impedance voltmeters)
RM1 VC 0 10Meg
RM2 VB 0 10Meg

* Alias nodes for guaranteed logging
VALIASIN IN VIN 0
VALIASOUT OUT VC 0

.model DRED D(IS=1e-18 N=2.0 RS=10 CJO=20p VJ=0.75 M=0.5 TT=50n BV=5 IBV=10u)
* ... (truncated in public view) ...

Copy this content into a .cir file and run with ngspice.

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* Practical case: Base Biasing with Resistor
.width out=256

V1 VCC 0 DC 5
VSIG VIN 0 PULSE(0 5 10m 1u 1u 245m 1s)

R1 VIN VB 1k
R2 VCC VLED 150
D1 VLED VC DRED
Q1 VC VB 0 Q2N2222

* Optional multimeter loading approximations (high impedance voltmeters)
RM1 VC 0 10Meg
RM2 VB 0 10Meg

* Alias nodes for guaranteed logging
VALIASIN IN VIN 0
VALIASOUT OUT VC 0

.model DRED D(IS=1e-18 N=2.0 RS=10 CJO=20p VJ=0.75 M=0.5 TT=50n BV=5 IBV=10u)
.model Q2N2222 NPN(IS=1e-14 BF=200 VAF=100 IKF=0.1 ISE=1e-13 NE=1.5 BR=5 NR=1.0 VAR=25 IKR=0.05
+ RC=0.5 RE=0.2 RB=10 CJE=25p VJE=0.75 MJE=0.33 TF=0.4n XTF=2 CJC=8p VJC=0.55 MJC=0.33 TR=50n)

.save V(IN) V(OUT) V(VIN) V(VC) V(VB) V(VLED) I(V1) I(VSIG)

.op
.print op V(IN) V(OUT) V(VIN) V(VC) V(VB) V(VLED) I(V1) I(VSIG)

.tran 0.1m 250m
.print tran V(IN) V(OUT) V(VIN) V(VC) V(VB) V(VLED) I(V1) I(VSIG)

.end

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)
Show raw data table (2528 rows)
Index   time            v(in)           v(out)          v(vin)          v(vc)           v(vb)           v(vled)         v1#branch       vsig#branch
0	0.000000e+00	0.000000e+00	3.623103e+00	0.000000e+00	3.623103e+00	3.624741e-09	4.999946e+00	-3.62318e-07	3.624741e-12
1	1.000000e-06	0.000000e+00	3.623104e+00	0.000000e+00	3.623104e+00	6.699379e-09	4.999946e+00	-3.62321e-07	6.699379e-12
2	2.000000e-06	0.000000e+00	3.623105e+00	0.000000e+00	3.623105e+00	6.506970e-09	4.999946e+00	-3.62321e-07	6.506970e-12
3	4.000000e-06	0.000000e+00	3.623106e+00	0.000000e+00	3.623106e+00	5.984372e-09	4.999946e+00	-3.62320e-07	5.984372e-12
4	8.000000e-06	0.000000e+00	3.623108e+00	0.000000e+00	3.623108e+00	5.188535e-09	4.999946e+00	-3.62320e-07	5.188535e-12
5	1.600000e-05	0.000000e+00	3.623110e+00	0.000000e+00	3.623110e+00	4.293865e-09	4.999946e+00	-3.62319e-07	4.293865e-12
6	3.200000e-05	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.693772e-09	4.999946e+00	-3.62318e-07	3.693772e-12
7	6.400000e-05	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.610539e-09	4.999946e+00	-3.62318e-07	3.610539e-12
8	1.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.631021e-09	4.999946e+00	-3.62318e-07	3.631021e-12
9	2.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.621414e-09	4.999946e+00	-3.62318e-07	3.621414e-12
10	3.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.626121e-09	4.999946e+00	-3.62318e-07	3.626121e-12
11	4.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.624676e-09	4.999946e+00	-3.62318e-07	3.624676e-12
12	5.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.623957e-09	4.999946e+00	-3.62318e-07	3.623957e-12
13	6.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.626113e-09	4.999946e+00	-3.62318e-07	3.626113e-12
14	7.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.623011e-09	4.999946e+00	-3.62318e-07	3.623011e-12
15	8.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.626745e-09	4.999946e+00	-3.62318e-07	3.626745e-12
16	9.280000e-04	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.622584e-09	4.999946e+00	-3.62318e-07	3.622584e-12
17	1.028000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.627045e-09	4.999946e+00	-3.62318e-07	3.627045e-12
18	1.128000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.622367e-09	4.999946e+00	-3.62318e-07	3.622367e-12
19	1.228000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.627168e-09	4.999946e+00	-3.62318e-07	3.627168e-12
20	1.328000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.622305e-09	4.999946e+00	-3.62318e-07	3.622305e-12
21	1.428000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.627229e-09	4.999946e+00	-3.62318e-07	3.627229e-12
22	1.528000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.622257e-09	4.999946e+00	-3.62318e-07	3.622257e-12
23	1.628000e-03	0.000000e+00	3.623112e+00	0.000000e+00	3.623112e+00	3.627228e-09	4.999946e+00	-3.62318e-07	3.627228e-12
... (2504 more rows) ...

Common mistakes and how to avoid them

  1. Using no base resistor
  2. Error: connecting the logic output directly to the transistor base.
  3. Result: excessive base current and possible damage to the logic output.
  4. Fix: always place R1 between VIN and VB.

  5. Choosing a base resistor that is too large

  6. Error: using R1 = 10 kΩ without checking current.
  7. Result: base current may be too low, so the transistor may not saturate.
  8. Fix: calculate Ib from the load current and use a forced gain of about 10 for switching.

  9. Reversing transistor terminals

  10. Error: swapping collector and emitter.
  11. Result: abnormal voltages, weak load current, or no switching.
  12. Fix: confirm the 2N2222 pinout from its datasheet before wiring.

Troubleshooting

  • Symptom: LED never turns ON
  • Cause: VSIG is not reaching 5 V, or Q1 base is not connected through R1.
  • Fix: measure VIN and VB; verify R1 continuity and transistor pinout.

  • Symptom: LED is dim

  • Cause: transistor is not saturated because R1 is too large.
  • Fix: reduce R1 after checking the logic output current limit.

  • Symptom: Logic output voltage drops when ON

  • Cause: base current demand is too high for the logic source.
  • Fix: increase R1 or use a transistor driver stage.

  • Symptom: LED stays ON all the time

  • Cause: wrong wiring at the collector node or unintended base bias.
  • Fix: check that Q1 emitter is at 0 and that VIN actually goes to 0 V in the LOW state.

  • Symptom: Measured Vce is high when ON

  • Cause: insufficient base current or incorrect collector load wiring.
  • Fix: verify Ib, recalculate R1, and check R2 and D1 orientation.

Possible improvements and extensions

  • Add a 10 kΩ pull-down resistor from VB to 0 so the transistor stays OFF if the logic source becomes disconnected or high-impedance.
  • Replace the LED load with a relay coil and add a flyback diode across the coil to study transistor switching with inductive loads.

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Quick Quiz

Question 1: What is the main purpose of the base resistor in the 5 V logic-driven NPN switch?




Question 2: According to the article, what load current is expected when the transistor is ON?




Question 3: What is the target base current mentioned for reliable switching?




Question 4: If the logic output is HIGH at 5 V and the base-emitter voltage is about 0.7 V, what voltage is approximately across the 1 kΩ base resistor?




Question 5: Using the article values, what base current flows through a 1 kΩ resistor when driven from 5 V with V_BE about 0.7 V?




Question 6: Why is a forced beta of around 5 reasonable here?




Question 7: What collector-emitter voltage indicates the transistor is in saturation according to the article?




Question 8: What should happen when the logic output is LOW?




Question 9: Which transistor is used as the low-side switch in this example?




Question 10: If a microcontroller pin can safely supply up to 5 mA, is the article's target base current acceptable?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

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Practical case: R-2R Resistor Network (Simple DAC)

R-2R Resistor Network (Simple DAC) prototype (Maker Style)

Level: Medium. Construct a resistive ladder to convert 4-bit binary signals into precise analog voltage levels.

Objective and use case

In this session, you will build a 4-bit Digital-to-Analog Converter (DAC) using an R-2R resistor ladder topology. This circuit sums binary weighted inputs to produce an analog output proportional to the digital value.

Why it is useful:
* Audio Synthesis: Used in simple function generators to create sine or triangle waves from digital microcontrollers.
* Video Signals: Historically used in VGA adapters to generate color intensity levels.
* Cost-Effective Control: Allows generating variable control voltages without dedicated DAC chips.
* Signal Processing Education: Demonstrates superposition and Thevenin’s theorem in a practical way.

Expected outcome:
* A stable output voltage (VOUT) that ranges from 0 V to approximately 4.68 V (given a 5 V supply).
* Sixteen distinct voltage steps (from binary 0000 to 1111).
* Linear relationship between the binary input value and the measured analog voltage.

Target audience and level: Electronics students and hobbyists familiar with basic circuit laws.

Materials

  • V1: 5 V DC supply, function: Logic high reference and main power.
  • R1: 10 kΩ resistor, function: Series resistor (R) in ladder spine (Bit 0-1).
  • R2: 10 kΩ resistor, function: Series resistor (R) in ladder spine (Bit 1-2).
  • R3: 10 kΩ resistor, function: Series resistor (R) in ladder spine (Bit 2-3).
  • R4: 20 kΩ resistor, function: Parallel resistor (2R) for Bit 0 (LSB).
  • R5: 20 kΩ resistor, function: Parallel resistor (2R) for Bit 1.
  • R6: 20 kΩ resistor, function: Parallel resistor (2R) for Bit 2.
  • R7: 20 kΩ resistor, function: Parallel resistor (2R) for Bit 3 (MSB).
  • R8: 20 kΩ resistor, function: Termination resistor (2R) connected to Ground.
  • SW1: SPDT switch (or jumper wire), function: Bit 0 input (LSB), switches between VCC and GND.
  • SW2: SPDT switch (or jumper wire), function: Bit 1 input, switches between VCC and GND.
  • SW3: SPDT switch (or jumper wire), function: Bit 2 input, switches between VCC and GND.
  • SW4: SPDT switch (or jumper wire), function: Bit 3 input (MSB), switches between VCC and GND.

Wiring guide

This guide uses node names: VCC (5 V), 0 (GND), B0 (Bit 0 Input), B1 (Bit 1 Input), B2 (Bit 2 Input), B3 (Bit 3 Input), and internal ladder nodes N0, N1, N2. VOUT is the analog output.

  • V1 Connection: Connect V1 positive terminal to VCC and negative to 0.
  • Input Switches (Digital Inputs):
    • SW1: Common to B0, Position 1 to 0, Position 2 to VCC.
    • SW2: Common to B1, Position 1 to 0, Position 2 to VCC.
    • SW3: Common to B2, Position 1 to 0, Position 2 to VCC.
    • SW4: Common to B3, Position 1 to 0, Position 2 to VCC.
  • Ladder «R» Resistors (Spine):
    • R1: Connects between node N0 and node N1.
    • R2: Connects between node N1 and node N2.
    • R3: Connects between node N2 and node VOUT.
  • Ladder «2R» Resistors (Branches):
    • R8 (Termination): Connects between node N0 and 0.
    • R4: Connects between node B0 and node N0.
    • R5: Connects between node B1 and node N1.
    • R6: Connects between node B2 and node N2.
    • R7: Connects between node B3 and node VOUT.
  • Output: Monitor voltage at node VOUT relative to 0.

Conceptual block diagram

Conceptual block diagram — LM358 R-2R Ladder DAC
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

[ DIGITAL INPUTS ]              [ R-2R LADDER NETWORK ]                 [ ANALOG OUTPUT ]
(Switches toggle VCC/GND)           (Voltage Summing Logic)

                                                                           +--> [ Multimeter ]
                                                                           |    (Measure V)
[ SW4: Bit 3 (MSB) ] --(High/Low)--> [ R7: 20k (2R) ] --(Bit 3 Weight)---->+--> [ VOUT Node  ]
                                                            ^
                                                            |
                                                     [ R3: 10k (R) ]
                                                            |
[ SW3: Bit 2       ] --(High/Low)--> [ R6: 20k (2R) ] --(Bit 2 Weight)---->+ (Node N2)
                                                            ^
                                                            |
                                                     [ R2: 10k (R) ]
                                                            |
[ SW2: Bit 1       ] --(High/Low)--> [ R5: 20k (2R) ] --(Bit 1 Weight)---->+ (Node N1)
                                                            ^
                                                            |
                                                     [ R1: 10k (R) ]
                                                            |
[ SW1: Bit 0 (LSB) ] --(High/Low)--> [ R4: 20k (2R) ] --(Bit 0 Weight)---->+ (Node N0)
                                                            |
                                                            v
                                                     [ R8: 20k (2R) ]
                                                            |
                                                           GND
Schematic (ASCII)

Electrical diagram

Electrical diagram for case: Practical case: R-2R Resistor Network (Simple DAC)
Generated from the validated SPICE netlist for this case.

🔒 This electrical diagram is premium. With the 7-day pass or the monthly membership you can unlock the complete didactic material and the print-ready PDF pack.🔓 See premium access plans

Measurements and tests

To validate the DAC, you will set the switches to specific binary codes and measure the resulting voltage at VOUT. The formula for the output is:
$VOUT = Vref × ((Decimal Value) / 16)$

  1. Zero Check: Set all switches (SW1-SW4) to 0 (GND). Measure VOUT. It should be exactly 0 V.
  2. LSB Check (Bit 0): Set SW1 to VCC and others to 0 (Binary 0001).
    • Calculation: $5 V × (1/16) = 0.3125 V$.
    • Verify VOUT is approx 0.31 V.
  3. MSB Check (Bit 3): Set SW4 to VCC and others to 0 (Binary 1000).
    • Calculation: $5 V × (8/16) = 2.5 V$.
    • Verify VOUT is approx 2.5 V.
  4. Full Scale Check: Set all switches to VCC (Binary 1111).
    • Calculation: $5 V × (15/16) = 4.6875 V. * Verify VOUT is approx 4.69 V. <! – – SPICE_INSERT_POINT – – > ## Common mistakes and how to avoid them 1. Floating Inputs: Leaving a switch open (disconnected) instead of connecting it to Ground for logic «0». * Solution: R – 2R ladders require inputs to be strictly atV_{ref}$ or $0 V$. Use SPDT switches or verify your jumper wires connect to GND when «off».
  5. Swapping R and 2R: Placing a 10 kΩ resistor where a 20 kΩ is required (or vice versa).
    • Solution: Double-check color codes. 10 kΩ is usually Brown-Black-Orange; 20 kΩ is Red-Black-Orange.
  6. Loading the Output: Connecting a low-impedance load (like a speaker or LED) directly to VOUT.
    • Solution: This circuit has a relatively high output impedance ($R$). Always use an Op-Amp buffer (voltage follower) if you need to drive a load.

Troubleshooting

  • Symptom: $V_{OUT}$ is 2.5 V when it should be 1.25 V.
    • Cause: The MSB (Bit 3) might be stuck high, or resistors are swapped.
    • Fix: Check switch continuity and verify resistor placement at node VOUT.
  • Symptom: Output voltages are non-linear or random.
    • Cause: Poor connection on the «spine» resistors (R1, R2, R3).
    • Fix: Re-seat the resistors on the breadboard to ensure the ladder chain is intact.
  • Symptom: Output never reaches near 4.6 V.
    • Cause: Resistor tolerance accumulation or low power supply voltage.
    • Fix: Measure V1 actual voltage. Use 1% tolerance metal film resistors for better precision.

Possible improvements and extensions

  1. 8-Bit Expansion: Add four more stages to the ladder (using more R and 2R resistors) to create an 8-bit DAC with 256 voltage steps.
  2. Active Buffering: Connect VOUT to an LM358 Op-Amp configured as a unity-gain buffer to drive an LED or a small audio speaker safely.

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Quick Quiz

Question 1: What is the primary function of the circuit described in the text?




Question 2: Which resistor topology is used to build the DAC in this session?




Question 3: What is the expected maximum output voltage (V_OUT) given a 5 V supply?




Question 4: How many distinct voltage steps can a 4-bit DAC produce?




Question 5: Which of the following is a historical use case mentioned for this type of circuit?




Question 6: What relationship is expected between the binary input value and the measured analog voltage?




Question 7: What theoretical concepts does this project demonstrate practically?




Question 8: Why is the R-2R ladder considered a cost-effective control method?




Question 9: Which application involves creating sine or triangle waves from digital microcontrollers?




Question 10: Who is the target audience for this project?




SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: R-2R Resistor Network (Simple DAC)

* --- Power Supply ---
* V1: 5 V DC supply, function: Logic high reference and main power
V1 VCC 0 DC 5

* --- Digital Inputs (Simulated Switches) ---
* Modeled as PULSE voltage sources to strictly simulate user input/switching.
* Generates a binary counting sequence (0000 to 1111) to test the full truth table.
* Logic High = 5V (VCC), Logic Low = 0V (GND).

* SW1 (Bit 0 LSB): Toggles every 100us (Period)
VB0 B0 0 PULSE(0 5 0 1u 1u 50u 100u)

* SW2 (Bit 1): Toggles every 200us (Period)
VB1 B1 0 PULSE(0 5 0 1u 1u 100u 200u)

* SW3 (Bit 2): Toggles every 400us (Period)
VB2 B2 0 PULSE(0 5 0 1u 1u 200u 400u)

* ... (truncated in public view) ...

Copy this content into a .cir file and run with ngspice.

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* Practical case: R-2R Resistor Network (Simple DAC)

* --- Power Supply ---
* V1: 5 V DC supply, function: Logic high reference and main power
V1 VCC 0 DC 5

* --- Digital Inputs (Simulated Switches) ---
* Modeled as PULSE voltage sources to strictly simulate user input/switching.
* Generates a binary counting sequence (0000 to 1111) to test the full truth table.
* Logic High = 5V (VCC), Logic Low = 0V (GND).

* SW1 (Bit 0 LSB): Toggles every 100us (Period)
VB0 B0 0 PULSE(0 5 0 1u 1u 50u 100u)

* SW2 (Bit 1): Toggles every 200us (Period)
VB1 B1 0 PULSE(0 5 0 1u 1u 100u 200u)

* SW3 (Bit 2): Toggles every 400us (Period)
VB2 B2 0 PULSE(0 5 0 1u 1u 200u 400u)

* SW4 (Bit 3 MSB): Toggles every 800us (Period)
VB3 B3 0 PULSE(0 5 0 1u 1u 400u 800u)

* --- R-2R Ladder Network ---

* -- Spine Resistors (R = 10k) --
* R1: Connects between node N0 and node N1
R1 N0 N1 10k

* R2: Connects between node N1 and node N2
R2 N1 N2 10k

* R3: Connects between node N2 and node VOUT
R3 N2 VOUT 10k

* -- Branch/Termination Resistors (2R = 20k) --
* R8 (Termination): Connects between node N0 and 0 (GND)
R8 N0 0 20k

* R4 (Bit 0 Input): Connects between node B0 and node N0
R4 B0 N0 20k

* R5 (Bit 1 Input): Connects between node B1 and node N1
R5 B1 N1 20k

* R6 (Bit 2 Input): Connects between node B2 and node N2
R6 B2 N2 20k

* R7 (Bit 3 Input - MSB): Connects between node B3 and node VOUT
R7 B3 VOUT 20k

* --- Simulation Directives ---
* Transient analysis to capture the full binary counting sequence (approx 1ms)
.tran 2u 1000u

* --- Output Printing ---
* Monitor the Input Bits and the Analog Output Voltage
.print tran V(B0) V(B1) V(B2) V(B3) V(VOUT)

.op
.end

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)
Show raw data table (1384 rows)
Index   time            v(b0)           v(b1)           v(b2)
0	0.000000e+00	0.000000e+00	0.000000e+00	0.000000e+00
1	1.000000e-08	5.000000e-02	5.000000e-02	5.000000e-02
2	2.000000e-08	1.000000e-01	1.000000e-01	1.000000e-01
3	4.000000e-08	2.000000e-01	2.000000e-01	2.000000e-01
4	8.000000e-08	4.000000e-01	4.000000e-01	4.000000e-01
5	1.600000e-07	8.000000e-01	8.000000e-01	8.000000e-01
6	3.200000e-07	1.600000e+00	1.600000e+00	1.600000e+00
7	6.400000e-07	3.200000e+00	3.200000e+00	3.200000e+00
8	1.000000e-06	5.000000e+00	5.000000e+00	5.000000e+00
9	1.064000e-06	5.000000e+00	5.000000e+00	5.000000e+00
10	1.192000e-06	5.000000e+00	5.000000e+00	5.000000e+00
11	1.448000e-06	5.000000e+00	5.000000e+00	5.000000e+00
12	1.960000e-06	5.000000e+00	5.000000e+00	5.000000e+00
13	2.984000e-06	5.000000e+00	5.000000e+00	5.000000e+00
14	4.984000e-06	5.000000e+00	5.000000e+00	5.000000e+00
15	6.984000e-06	5.000000e+00	5.000000e+00	5.000000e+00
16	8.984000e-06	5.000000e+00	5.000000e+00	5.000000e+00
17	1.098400e-05	5.000000e+00	5.000000e+00	5.000000e+00
18	1.298400e-05	5.000000e+00	5.000000e+00	5.000000e+00
19	1.498400e-05	5.000000e+00	5.000000e+00	5.000000e+00
20	1.698400e-05	5.000000e+00	5.000000e+00	5.000000e+00
21	1.898400e-05	5.000000e+00	5.000000e+00	5.000000e+00
22	2.098400e-05	5.000000e+00	5.000000e+00	5.000000e+00
23	2.298400e-05	5.000000e+00	5.000000e+00	5.000000e+00
... (1360 more rows) ...
Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

Follow me:


Practical case: Unbalanced Wheatstone Bridge

Unbalanced Wheatstone Bridge prototype (Maker Style)

Level: Medium. Analyze differential voltage variation in a resistive bridge by modifying a sensor.

Objective and use case

You will build a Wheatstone bridge circuit using three fixed resistors and one variable resistor to simulate a resistive sensor. This circuit converts a change in resistance into a measurable differential voltage output.

Why it is useful:
* Precision Sensing: Used in load cells (weighing scales) and strain gauges where resistance changes are minute.
* Temperature Measurement: Fundamental for reading RTDs (Resistance Temperature Detectors) and thermistors.
* Zero Calibration: Allows systems to establish a «null point» (0 V output) to cancel out offset errors before taking measurements.
* Small Signal Detection: Filters out power supply noise common to both legs of the bridge (Common Mode Rejection).

Expected outcome:
* Balanced State: When the variable resistor matches the ratio of the fixed arm, the differential voltage (VAB) reads exactly 0 V.
* Unbalanced State: As the resistance changes, VAB becomes positive or negative depending on the direction of the change.
* Sensitivity: You will observe the non-linear relationship between the resistance change (\Delta R) and the output voltage (VOUT).

Target audience and level: Electronics students and hobbyists familiar with Ohm’s Law (Medium).

Materials

  • V1: 5 V DC voltage source, function: main power supply.
  • R1: 1 kΩ resistor, function: upper reference arm.
  • R2: 1 kΩ resistor, function: lower reference arm.
  • R3: 1 kΩ resistor, function: upper measurement arm.
  • R4: 2 kΩ potentiometer (linear), function: variable resistor (simulating a sensor like a thermistor or strain gauge).

Wiring guide

This circuit consists of two parallel voltage dividers connected to a common source. The output is taken differentially between the center points of these dividers.

  • V1 connects between node VCC (positive) and node 0 (GND).
  • R1 connects between node VCC and node VA (Reference Point).
  • R2 connects between node VA and node 0.
  • R3 connects between node VCC and node VB (Measurement Point).
  • R4 connects between node VB and node 0.
  • Measurement: The output VOUT is measured between node VA and node VB.

Conceptual block diagram

Conceptual block diagram — Unbalanced Wheatstone Bridge
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

[ SOURCE ]                     [ BRIDGE PROCESSING ]                     [ OUTPUT ]

                               +-----------------------------+
                               |   Reference Divider (Left)  |
                            +->|  (Fixed Ratio: R1 / R2)     |--(Node VA)-->+
                            |  |  [ R1: 1 kΩ ] + [ R2: 1 kΩ ]  |              |
                            |  +-----------------------------+              |
                            |                                               v
[ V1: 5 V DC ] --(Supply)--> +                                          [ V_OUT ]
                            |                                          (Differential)
                            |  +-----------------------------+         ( VA - VB )
                            |  |  Measurement Divider (Right)|              ^
                            +->|  (Variable Ratio: R3 / R4)  |--(Node VB)-->+
                               |  [ R3: 1 kΩ ] + [ R4: Pot ]  |
                               +-----------------------------+
Schematic (ASCII)

Electrical diagram

Electrical diagram for case: Unbalanced Wheatstone Bridge
Generated from the validated SPICE netlist for this case.

🔒 This electrical diagram is premium. With the 7-day pass or the monthly membership you can unlock the complete didactic material and the print-ready PDF pack.🔓 See premium access plans

Measurements and tests

Follow these steps to validate the bridge operation using a voltmeter or multimeter.

  1. Setup: Power the circuit with 5 V. Set your multimeter to measure DC Voltage in the 20 V or 2 V range.
  2. Verify Reference: Measure the voltage between VA and 0 (GND). With R1 and R2 being equal (1 kΩ), this should be stable at exactly 2.5 V.
  3. Find the Null Point: Connect the multimeter probes between VA (red probe) and VB (black probe). Adjust potentiometer R4 until the multimeter reads 0.00 V.
    • Observation: At this point, the bridge is balanced (R1 / R2 = R3 / R4). R4 should be approximately 1 kΩ.
  4. Simulate Sensor Increase: Increase the resistance of R4.
    • Observation: The voltage at VB rises. The differential reading (VA – VB) will become negative (assuming Red probe on A, Black on B).
  5. Simulate Sensor Decrease: Decrease the resistance of R4 below 1 kΩ.
    • Observation: The voltage at VB drops. The differential reading will become positive.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: Unbalanced Wheatstone Bridge

* --- Power Supply ---
* V1: 5 V DC voltage source, main power supply
V1 VCC 0 DC 5

* --- Reference Arm (Left) ---
* R1: 1 kΩ, upper reference arm
R1 VCC VA 1k

* R2: 1 kΩ, lower reference arm
R2 VA 0 1k

* --- Measurement Arm (Right) ---
* R3: 1 kΩ, upper measurement arm
R3 VCC VB 1k

* R4: 2 kΩ potentiometer (simulating sensor), lower measurement arm
* Connected between VB and 0. Set to 2k to demonstrate unbalanced state.
R4 VB 0 2k
* ... (truncated in public view) ...

Copy this content into a .cir file and run with ngspice.

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* Practical case: Unbalanced Wheatstone Bridge

* --- Power Supply ---
* V1: 5 V DC voltage source, main power supply
V1 VCC 0 DC 5

* --- Reference Arm (Left) ---
* R1: 1 kΩ, upper reference arm
R1 VCC VA 1k

* R2: 1 kΩ, lower reference arm
R2 VA 0 1k

* --- Measurement Arm (Right) ---
* R3: 1 kΩ, upper measurement arm
R3 VCC VB 1k

* R4: 2 kΩ potentiometer (simulating sensor), lower measurement arm
* Connected between VB and 0. Set to 2k to demonstrate unbalanced state.
R4 VB 0 2k

* --- Simulation Setup ---
* Calculate DC operating point
.op

* Transient analysis (10ms duration to verify stability)
.tran 100u 10m

* --- Output Directives ---
* Monitor Supply, Reference Voltage (VA), and Sensor Voltage (VB)
* Differential Output VOUT = V(VA) - V(VB)
.print tran V(VCC) V(VA) V(VB)

.end

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)
Show raw data table (108 rows)
Index   time            v(vcc)          v(va)           v(vb)
0	0.000000e+00	5.000000e+00	2.500000e+00	3.333333e+00
1	1.000000e-06	5.000000e+00	2.500000e+00	3.333333e+00
2	2.000000e-06	5.000000e+00	2.500000e+00	3.333333e+00
3	4.000000e-06	5.000000e+00	2.500000e+00	3.333333e+00
4	8.000000e-06	5.000000e+00	2.500000e+00	3.333333e+00
5	1.600000e-05	5.000000e+00	2.500000e+00	3.333333e+00
6	3.200000e-05	5.000000e+00	2.500000e+00	3.333333e+00
7	6.400000e-05	5.000000e+00	2.500000e+00	3.333333e+00
8	1.280000e-04	5.000000e+00	2.500000e+00	3.333333e+00
9	2.280000e-04	5.000000e+00	2.500000e+00	3.333333e+00
10	3.280000e-04	5.000000e+00	2.500000e+00	3.333333e+00
11	4.280000e-04	5.000000e+00	2.500000e+00	3.333333e+00
12	5.280000e-04	5.000000e+00	2.500000e+00	3.333333e+00
13	6.280000e-04	5.000000e+00	2.500000e+00	3.333333e+00
14	7.280000e-04	5.000000e+00	2.500000e+00	3.333333e+00
15	8.280000e-04	5.000000e+00	2.500000e+00	3.333333e+00
16	9.280000e-04	5.000000e+00	2.500000e+00	3.333333e+00
17	1.028000e-03	5.000000e+00	2.500000e+00	3.333333e+00
18	1.128000e-03	5.000000e+00	2.500000e+00	3.333333e+00
19	1.228000e-03	5.000000e+00	2.500000e+00	3.333333e+00
20	1.328000e-03	5.000000e+00	2.500000e+00	3.333333e+00
21	1.428000e-03	5.000000e+00	2.500000e+00	3.333333e+00
22	1.528000e-03	5.000000e+00	2.500000e+00	3.333333e+00
23	1.628000e-03	5.000000e+00	2.500000e+00	3.333333e+00
... (84 more rows) ...

Common mistakes and how to avoid them

  1. Measuring relative to Ground: Students often measure VA to GND and VB to GND separately. While valid, the bridge is designed to be measured differentially (VA to VB) directly.
    • Solution: Place the voltmeter probes directly across the bridge midpoints.
  2. Using low-tolerance resistors: If R1 and R2 have high tolerance (e.g., 10%), the reference voltage VA will not be exactly VCC/2, making the null point hard to calculate.
    • Solution: Use 1% metal film resistors for R1, R2, and R3 for precision.
  3. Loading the bridge: Connecting a low-impedance load (like a motor or a low-resistance speaker) directly between VA and VB.
    • Solution: The bridge is for signal measurement, not power. Always connect the output nodes to a high-impedance input, such as an Op-Amp or microcontroller ADC.

Troubleshooting

  • Symptom: Output voltage is always 0 V regardless of potentiometer position.
    • Cause: Power supply is off or there is a short circuit between VA and VB.
    • Fix: Check V1 connections and ensure the two legs of the bridge are not shorted together.
  • Symptom: Cannot reach 0 V (Null point) output.
    • Cause: The fixed resistor R3 is significantly different from the range of potentiometer R4.
    • Fix: Ensure R4’s range includes the value of R3 (e.g., if R3 is 1 kΩ, R4 must be capable of reaching 1 kΩ).
  • Symptom: Readings are unstable or «jittery».
    • Cause: Noisy potentiometer wiper or loose breadboard contacts.
    • Fix: Replace the potentiometer or ensure solid connections on the breadboard.

Possible improvements and extensions

  1. Instrumentation Amplifier: Feed nodes VA and VB into an instrumentation amplifier (like the AD620) to amplify the small differential voltage for a microcontroller to read.
  2. Physical Sensor: Replace R4 with a photoresistor (LDR) or a thermistor (NTC). Observe how light or temperature changes the bridge balance.

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Quick Quiz

Question 1: What is the primary function of the Wheatstone bridge circuit described in the objective?




Question 2: Which component in the circuit is used to simulate a resistive sensor like a thermistor or strain gauge?




Question 3: What is the expected differential voltage (V_AB) when the bridge is in a 'Balanced State'?




Question 4: Why is 'Zero Calibration' mentioned as a useful feature of this circuit?




Question 5: In the context of 'Small Signal Detection', what does the bridge circuit help filter out?




Question 6: What happens to the differential voltage (V_AB) in an 'Unbalanced State'?




Question 7: Which application is explicitly listed as a use case for precision sensing with this circuit?




Question 8: What relationship is generally observed between the resistance change and the output voltage in a Wheatstone bridge?




Question 9: What is the role of the component labeled V1 in the context of this circuit?




Question 10: Which specific type of temperature sensor is mentioned as fundamental for reading with this circuit?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

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Practical case: Potentiometer as a variable divider

Potentiometer as a variable divider prototype (Maker Style)

Level: Basic. Objective: Understand how output voltage varies when modifying resistance in a potentiometer connected as a voltage divider.

Objective and use case

You will build a variable voltage divider circuit using a linear potentiometer to generate an adjustable analog voltage signal ranging from 0 V to the supply voltage.

  • Why it is useful:

    • Used in volume knobs for audio equipment.
    • Provides reference voltages for comparators and operational amplifiers.
    • Simulates analog sensor data (like temperature or light) during testing.
    • Acts as a control signal for dimmers and motor speed controllers.
    • Essential for calibrating sensitivity in sensor circuits.
  • Expected outcome:

    • The output voltage (VOUT) varies smoothly from 0 V to 5 V.
    • At the mechanical midpoint of a linear potentiometer, VOUT reads approximately 2.5 V.
    • The sum of voltage across the upper section and voltage across the lower section equals the source voltage (VIN).
  • Target audience and level: Students and electronics hobbyists (Level: Basic).

Materials

  • V1: 5 V DC supply, function: main power source.
  • R1: 10 kΩ linear potentiometer, function: variable voltage divider.
  • M1: Digital Multimeter (set to DC Volts), function: measure V_OUT.
  • W1: Jumper wires, function: interconnections.

Wiring guide

This circuit uses standard SPICE node naming conventions (VCC, 0 for GND, VOUT).

  • V1 (Positive Terminal): Connects to node VCC.
  • V1 (Negative Terminal): Connects to node 0 (GND).
  • R1 (Pin 1 – Top/Fixed): Connects to node VCC.
  • R1 (Pin 3 – Bottom/Fixed): Connects to node 0 (GND).
  • R1 (Pin 2 – Wiper/Variable): Connects to node VOUT.
  • M1 (Positive Probe): Connects to node VOUT.
  • M1 (Negative Probe): Connects to node 0 (GND).

Conceptual block diagram

Conceptual block diagram — Potentiometer
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

[ SOURCE ]                       [ COMPONENT ]                     [ MEASUREMENT ]

[ V1: 5 V Supply (+) ] --(Node VCC)--> [ R1: Pin 1 (Top)    ]
                                      |                    |
                                      |  Potentiometer     |
                                      |  (Voltage Divider) |
                                      |                    |
                                      |  R1: Pin 2 (Wiper) ] --(Node VOUT)--> [ M1: Multimeter (+) ]
                                      |                    |
[ V1: 5 V Supply (-) ] --(Node 0)----> [ R1: Pin 3 (Bottom) ] --(Node 0)-----> [ M1: Multimeter (-) ]
Schematic (ASCII)

Electrical diagram

Electrical diagram: Practical case: Potentiometer as a variable divider
Generated from the validated SPICE netlist for this case.

🔒 This electrical diagram is premium. With the 7-day pass or the monthly membership you can unlock the complete didactic material and the print-ready PDF pack.🔓 See premium access plans

Measurements and tests

Follow these steps to validate the voltage divider behavior:

  1. Setup: Configure the multimeter to measure DC Voltage (20 V range). Connect the black probe to Ground (0) and the red probe to the potentiometer wiper (VOUT).
  2. Minimum Check: Rotate the potentiometer knob fully counter-clockwise.
    • Observation: The multimeter should read roughly 0 V.
  3. Maximum Check: Rotate the potentiometer knob fully clockwise.
    • Observation: The multimeter should read roughly 5 V (or equal to your specific V1 voltage).
  4. Midpoint Check: Rotate the knob to the approximate physical center.
    • Observation: The multimeter should read approximately 2.5 V.
  5. Linearity Test: Turn the knob slowly from one end to the other.
    • Observation: The voltage reading should change smoothly without jumps.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: Potentiometer as a variable divider

* --- Power Supply ---
* V1: 5V Main power source
* Connected to VCC (+) and 0 (GND)
V1 VCC 0 DC 5

* --- Simulation Control Source ---
* Vknob simulates the mechanical action of the potentiometer.
* Sweeps from 0 (0%) to 1 (100%) over 500us.
Vknob knob 0 PWL(0 0 500u 1)

* --- R1: 10k Potentiometer ---
* Implemented as two behavioral voltage sources (B-sources) acting as variable resistors.
* This allows the "Variable Divider" behavior to be simulated in Transient analysis.
* Total Resistance ~ 10k.

* R1 Top Part (Pin 1 to Pin 2): Connects VCC to VOUT
* Resistance = 10k * (1 - Knob) + 1 ohm (offset to avoid divide-by-zero/shorts)
B_R1_top VCC VOUT V = I(B_R1_top) * (10000 * (1 - V(knob)) + 1)
* ... (truncated in public view) ...

Copy this content into a .cir file and run with ngspice.

🔒 Part of this section is premium. With the 7-day pass or the monthly membership you can access the full content (materials, wiring, detailed build, validation, troubleshooting, variants and checklist) and download the complete print-ready PDF pack.

* Practical case: Potentiometer as a variable divider

* --- Power Supply ---
* V1: 5V Main power source
* Connected to VCC (+) and 0 (GND)
V1 VCC 0 DC 5

* --- Simulation Control Source ---
* Vknob simulates the mechanical action of the potentiometer.
* Sweeps from 0 (0%) to 1 (100%) over 500us.
Vknob knob 0 PWL(0 0 500u 1)

* --- R1: 10k Potentiometer ---
* Implemented as two behavioral voltage sources (B-sources) acting as variable resistors.
* This allows the "Variable Divider" behavior to be simulated in Transient analysis.
* Total Resistance ~ 10k.

* R1 Top Part (Pin 1 to Pin 2): Connects VCC to VOUT
* Resistance = 10k * (1 - Knob) + 1 ohm (offset to avoid divide-by-zero/shorts)
B_R1_top VCC VOUT V = I(B_R1_top) * (10000 * (1 - V(knob)) + 1)

* R1 Bottom Part (Pin 2 to Pin 3): Connects VOUT to GND
* Resistance = 10k * Knob + 1 ohm
B_R1_bot VOUT 0 V = I(B_R1_bot) * (10000 * V(knob) + 1)

* --- M1: Digital Multimeter ---
* Function: Measure V_OUT.
* Modeled as a high input impedance load (10 Megohm) connected to VOUT and GND.
R_M1 VOUT 0 10Meg

* --- Analysis Commands ---
* Transient analysis to capture the full sweep of the potentiometer (500us)
.tran 1u 500u

* Print the Output Voltage and the Control Signal (Knob position)
.print tran V(VOUT) V(knob)

* Calculate DC operating point
.op

.end

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)
Show raw data table (508 rows)
Index   time            v(vout)         v(knob)
0	0.000000e+00	4.999000e-04	0.000000e+00
1	1.000000e-08	5.998800e-04	2.000000e-05
2	2.000000e-08	6.998599e-04	4.000000e-05
3	4.000000e-08	8.998199e-04	8.000000e-05
4	8.000000e-08	1.299740e-03	1.600000e-04
5	1.600000e-07	2.099579e-03	3.200000e-04
6	3.200000e-07	3.699258e-03	6.400000e-04
7	6.400000e-07	6.898613e-03	1.280000e-03
8	1.280000e-06	1.329731e-02	2.560000e-03
9	2.280000e-06	2.329525e-02	4.560000e-03
10	3.280000e-06	3.329314e-02	6.560000e-03
11	4.280000e-06	4.329099e-02	8.560000e-03
12	5.280000e-06	5.328880e-02	1.056000e-02
13	6.280000e-06	6.328657e-02	1.256000e-02
14	7.280000e-06	7.328430e-02	1.456000e-02
15	8.280000e-06	8.328200e-02	1.656000e-02
16	9.280000e-06	9.327965e-02	1.856000e-02
17	1.028000e-05	1.032773e-01	2.056000e-02
18	1.128000e-05	1.132749e-01	2.256000e-02
19	1.228000e-05	1.232724e-01	2.456000e-02
20	1.328000e-05	1.332699e-01	2.656000e-02
21	1.428000e-05	1.432674e-01	2.856000e-02
22	1.528000e-05	1.532648e-01	3.056000e-02
23	1.628000e-05	1.632622e-01	3.256000e-02
... (484 more rows) ...

Common mistakes and how to avoid them

  1. Floating the wiper: Connecting only the two fixed legs of the potentiometer makes it act as a fixed resistor. Always connect the middle pin (wiper) to your output node.
  2. Shorting the supply: Connecting the wiper to VCC and one fixed leg to 0, then turning the knob fully to the grounded side creates a short circuit. Ensure fixed legs go to Power and Ground, and the Wiper is the Output.
  3. Using a Logarithmic Potentiometer: Audio taper (Log) pots change resistance non-linearly. For a predictable voltage divider test, ensure you use a Linear taper (usually marked ‘B’).

Troubleshooting

  • Symptom: Voltage is constant at 2.5 V regardless of knob position.
    • Cause: The wiper is disconnected, or you are measuring across the fixed terminals.
    • Fix: Verify the multimeter probe is connected specifically to the center pin (wiper).
  • Symptom: Smoke or heat coming from the potentiometer.
    • Cause: Short circuit created by wiring the wiper to a rail and turning it to the opposite rail.
    • Fix: Immediately disconnect power. Re-wire so that the fixed outer pins connect to VCC and GND, and the wiper connects only to the high-impedance meter.
  • Symptom: Voltage jumps erratically (e.g., 1 V -> 4 V -> 2 V).
    • Cause: Dirty or defective internal track (wiper losing contact).
    • Fix: Replace the potentiometer or clean it with contact cleaner.

Possible improvements and extensions

  1. Loading Effect: Connect a 1 kΩ fixed resistor between VOUT and 0. Observe how the output voltage drops significantly compared to the unloaded state, demonstrating impedance mismatch.
  2. Safe Limits: Add a 330 Ω fixed resistor in series with the top leg and another with the bottom leg. This restricts the output range (e.g., 0.5 V to 4.5 V) and protects the potentiometer from short circuits if the output is accidentally grounded.

More Practical Cases on Prometeo.blog

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Quick Quiz

Question 1: What is the primary objective of the circuit described in the text?




Question 2: Which component acts as the variable voltage divider in this circuit?




Question 3: If the supply voltage is 5 V, what is the expected output voltage range?




Question 4: What is a common real-world application for this type of circuit mentioned in the text?




Question 5: Where is the wiper (Pin 2) of the potentiometer typically connected to measure the divided voltage?




Question 6: At the mechanical midpoint of a linear potentiometer with a 5 V supply, what should V_OUT read approximately?




Question 7: Which pin of the potentiometer connects to the Ground (node 0) in a standard voltage divider configuration?




Question 8: What is the function of the Digital Multimeter (M1) in this setup?




Question 9: According to the expected outcome, the sum of the voltage across the upper section and the lower section equals what?




Question 10: What specific type of potentiometer is recommended in the materials list?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

Follow me:


Practical case: Series and parallel resistors

Series and parallel resistors prototype (Maker Style)

Level: Basic – Verify equivalent resistance formulas through measurement.

Objective and use case

In this practical case, you will build a passive circuit using two resistors to analyze how resistance values change when components are connected in series versus parallel. You will measure the total equivalent resistance (Req) using a multimeter in ohmmeter mode.

  • Useful for:
    • Designing voltage dividers for sensors or power supplies.
    • Calculating total load resistance in power distribution networks.
    • Adjusting specific resistance values when standard components are not available.
    • Understanding current limiting paths in LED driver circuits.
  • Expected outcome:
    • Series Mode: The measured value should equal the sum of both resistors (Req ≈ 2 kΩ).
    • Parallel Mode: The measured value should be half of the individual resistance (if R1=R2) or follow the parallel formula (Req ≈ 500 Ω).
    • Verification: Measured values should fall within the tolerance range (e.g., ±5%) of the theoretical calculation.
  • Target audience: Students and hobbyists learning fundamental laws of circuit analysis (Ohm’s Law).

Materials

  • R1: 1 kΩ resistor, function: Test load A
  • R2: 1 kΩ resistor, function: Test load B
  • M1: Digital Multimeter, function: Resistance measurement (Ohmmeter)
  • W1: Jumper wires, function: Circuit interconnection

Wiring guide

This guide uses specific node names. Ensure the circuit is not connected to a voltage source (battery) during resistance measurements.

Part A: Series Configuration
* R1: Connects between node Node_A and node Node_B.
* R2: Connects between node Node_B and node Node_C.
* M1 (Positive Probe): Connects to Node_A.
* M1 (Negative Probe): Connects to Node_C.

Part B: Parallel Configuration (Re-wiring required)
* R1: Connects between node Node_A and node Node_B.
* R2: Connects between node Node_A and node Node_B (physically parallel to R1).
* M1 (Positive Probe): Connects to Node_A.
* M1 (Negative Probe): Connects to Node_B.

Conceptual block diagram

Conceptual block diagram — Series Resistance
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

PART A: SERIES CONFIGURATION (Current flows through R1 then R2)

      [ INPUT / SOURCE ]             [ CIRCUIT TOPOLOGY ]             [ RETURN / MEASURE ]

    [ M1 Probe (+) ] --(Node A)--> [ R1: 1kΩ ] --(Node B)--> [ R2: 1kΩ ] --(Node C)--> [ M1 Probe (-) ]



PART B: PARALLEL CONFIGURATION (Current splits between R1 and R2)

      [ INPUT / SOURCE ]             [ CIRCUIT TOPOLOGY ]             [ RETURN / MEASURE ]

                                         +--> [ R1: 1kΩ ] --+
    [ M1 Probe (+) ] --(Node A)--> [ SPLIT ]                [ JOIN ] --(Node B)--> [ M1 Probe (-) ]
                                         +--> [ R2: 1kΩ ] --+
Schematic (ASCII)

Electrical diagram

Electrical diagram: Practical case: Series and parallel resistors
Generated from the validated SPICE netlist for this case.

🔒 This electrical diagram is premium. With the 7-day pass or the monthly membership you can unlock the complete didactic material and the print-ready PDF pack.🔓 See premium access plans

Measurements and tests

Perform these steps with the multimeter set to the Ohms (Ω) setting (start with the 20k range if manual).

  1. Component verification:
    • Measure R1 and R2 individually before connecting them. Confirm they are approximately 1 kΩ each.
  2. Series measurement:
    • Construct the circuit described in Part A of the Wiring Guide.
    • Connect the probes to Node_A and Node_C.
    • Validation: The display should read approximately 2.0 kΩ ($R1 + R2$).
  3. Parallel measurement:
    • Modify the circuit to match Part B of the Wiring Guide (connect both resistor ends to the same pair of rows).
    • Connect the probes across the parallel pair.
    • Validation: The display should read approximately 0.5 kΩ (500 Ω).
  4. Comparison:
    • Observe that the series combination increases total resistance, while the parallel combination decreases total resistance.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: Series and parallel resistors
*
* This netlist implements both Part A (Series) and Part B (Parallel) 
* configurations as separate sub-circuits to allow simultaneous simulation.
*
* BOM:
* R1, R2: 1 kΩ resistors
* M1: Digital Multimeter (Simulated as 1mA Current Source for Resistance Measurement)
* W1: Jumper wires (Implicit in netlist connectivity)

* ==============================================================================
* GLOBAL SETTINGS
* ==============================================================================
* Global Ground is Node 0.
* Unused System Supply (Required by prompt constraints)
VCC_Supply VCC 0 DC 5

* ==============================================================================
* PART A: SERIES CONFIGURATION
* ==============================================================================
* ... (truncated in public view) ...

Copy this content into a .cir file and run with ngspice.

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* Practical case: Series and parallel resistors
*
* This netlist implements both Part A (Series) and Part B (Parallel) 
* configurations as separate sub-circuits to allow simultaneous simulation.
*
* BOM:
* R1, R2: 1 kΩ resistors
* M1: Digital Multimeter (Simulated as 1mA Current Source for Resistance Measurement)
* W1: Jumper wires (Implicit in netlist connectivity)

* ==============================================================================
* GLOBAL SETTINGS
* ==============================================================================
* Global Ground is Node 0.
* Unused System Supply (Required by prompt constraints)
VCC_Supply VCC 0 DC 5

* ==============================================================================
* PART A: SERIES CONFIGURATION
* ==============================================================================
* Wiring Guide Mapping:
* Node_A -> Node_A_Ser
* Node_B -> Node_B_Ser
* Node_C -> Node_C_Ser
*
* Connections:
* R1 connects between Node_A and Node_B
* R2 connects between Node_B and Node_C
* M1 (Ohmmeter) connects to Node_A (+) and Node_C (-)
*
* Simulation Logic:
* Ohmmeter is modeled as a 1mA Current Source (I_M1_Ser) injecting into the 
* positive probe node, with the negative probe node grounded.
* V(Node_A_Ser) = Resistance * 1mA => 1V = 1kΩ.

I_M1_Ser     0            Node_A_Ser   DC 1m
R1_Ser       Node_A_Ser   Node_B_Ser   1k
R2_Ser       Node_B_Ser   Node_C_Ser   1k
V_M1_Ret_Ser Node_C_Ser   0            DC 0   ; Ground return for M1 (-)

* ==============================================================================
* PART B: PARALLEL CONFIGURATION
* ==============================================================================
* Wiring Guide Mapping:
* Node_A -> Node_A_Par
* Node_B -> Node_B_Par
*
* Connections:
* R1 connects between Node_A and Node_B
* R2 connects between Node_A and Node_B (Physically parallel)
* M1 (Ohmmeter) connects to Node_A (+) and Node_B (-)

I_M1_Par     0            Node_A_Par   DC 1m
R1_Par       Node_A_Par   Node_B_Par   1k
R2_Par       Node_A_Par   Node_B_Par   1k
V_M1_Ret_Par Node_B_Par   0            DC 0   ; Ground return for M1 (-)

* ==============================================================================
* ANALYSIS DIRECTIVES
* ==============================================================================
* Transient analysis to satisfy prompt requirements for logging
.tran 100u 5ms

* Print voltages representing resistance values
* V(Node_A_Ser) should be ~2.0V (2kΩ)
* V(Node_A_Par) should be ~0.5V (500Ω)
.print tran V(Node_A_Ser) V(Node_B_Ser) V(Node_A_Par)

* DC Operating Point for quick verification
.op

.end

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)
Show raw data table (59 rows)
Index   time            v(node_a_ser)   v(node_b_ser)   v(node_a_par)
0	0.000000e+00	2.000000e+00	1.000000e+00	5.000000e-01
1	5.000000e-07	2.000000e+00	1.000000e+00	5.000000e-01
2	1.000000e-06	2.000000e+00	1.000000e+00	5.000000e-01
3	2.000000e-06	2.000000e+00	1.000000e+00	5.000000e-01
4	4.000000e-06	2.000000e+00	1.000000e+00	5.000000e-01
5	8.000000e-06	2.000000e+00	1.000000e+00	5.000000e-01
6	1.600000e-05	2.000000e+00	1.000000e+00	5.000000e-01
7	3.200000e-05	2.000000e+00	1.000000e+00	5.000000e-01
8	6.400000e-05	2.000000e+00	1.000000e+00	5.000000e-01
9	1.280000e-04	2.000000e+00	1.000000e+00	5.000000e-01
10	2.280000e-04	2.000000e+00	1.000000e+00	5.000000e-01
11	3.280000e-04	2.000000e+00	1.000000e+00	5.000000e-01
12	4.280000e-04	2.000000e+00	1.000000e+00	5.000000e-01
13	5.280000e-04	2.000000e+00	1.000000e+00	5.000000e-01
14	6.280000e-04	2.000000e+00	1.000000e+00	5.000000e-01
15	7.280000e-04	2.000000e+00	1.000000e+00	5.000000e-01
16	8.280000e-04	2.000000e+00	1.000000e+00	5.000000e-01
17	9.280000e-04	2.000000e+00	1.000000e+00	5.000000e-01
18	1.028000e-03	2.000000e+00	1.000000e+00	5.000000e-01
19	1.128000e-03	2.000000e+00	1.000000e+00	5.000000e-01
20	1.228000e-03	2.000000e+00	1.000000e+00	5.000000e-01
21	1.328000e-03	2.000000e+00	1.000000e+00	5.000000e-01
22	1.428000e-03	2.000000e+00	1.000000e+00	5.000000e-01
23	1.528000e-03	2.000000e+00	1.000000e+00	5.000000e-01
... (35 more rows) ...

Common mistakes and how to avoid them

  1. Measuring resistance with power on: Never measure resistance in a live circuit. This will give false readings and may blow the fuse in your multimeter. Solution: Disconnect all batteries or power supplies before using the ohmmeter.
  2. Touching the metal probes: If you hold the metal tips of the probes with both hands while measuring, your body’s resistance (parallel to the circuit) will affect the reading, especially with high-value resistors. Solution: Use alligator clips or press the probes against the breadboard without touching the metal tips.
  3. Assuming perfect values: A 1 kΩ resistor with 5% tolerance can physically measure between 950 Ω and 1050 Ω. Solution: Always measure the individual components first to know their actual values before calculating the expected total.

Troubleshooting

  • Symptom: Multimeter reads «1» or «OL» (Over Limit).
    • Cause: The resistance is higher than the selected range on the multimeter.
    • Fix: Switch the dial to a higher range (e.g., from 200 Ω to 2 kΩ or 20 kΩ).
  • Symptom: Reading is 0 Ω.
    • Cause: Short circuit; the probes might be touching each other or a wire is bypassing the resistors.
    • Fix: Check the breadboard rows to ensure the resistors are not shorted out by a misplaced jumper.
  • Symptom: Reading fluctuates or is unstable.
    • Cause: Poor contact between the resistor leads and the breadboard clips.
    • Fix: Remove the resistor, straighten the legs, and re-insert it firmly into different holes on the same node.

Possible improvements and extensions

  1. Mixed topology: Add a third resistor (R3 = 1 kΩ) in series with the parallel pair of R1 and R2 to create a Series-Parallel combination. Calculate and verify the new total (1.5 kΩ).
  2. Variable resistance: Replace R2 with a 10 kΩ potentiometer. Measure how the total resistance changes in both series and parallel configurations as you turn the knob.

More Practical Cases on Prometeo.blog

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Go to Amazon

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Quick Quiz

Question 1: What is the primary objective of this practical case?




Question 2: Which instrument is used to measure the equivalent resistance in this experiment?




Question 3: What is the expected equivalent resistance when two 1 kΩ resistors are connected in series?




Question 4: What is the expected equivalent resistance when two 1 kΩ resistors are connected in parallel?




Question 5: Which of the following is a practical application for understanding equivalent resistance mentioned in the text?




Question 6: According to the text, what is the expected outcome for the measured values compared to theoretical calculations?




Question 7: Who is the primary target audience for this practical case?




Question 8: Why might understanding equivalent resistance be useful for LED circuits?




Question 9: If standard components are not available, how does this knowledge help?




Question 10: In a parallel configuration with two identical resistors, how does the equivalent resistance compare to the individual resistance?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

Follow me: