Practical case: NE555 Delay-On Timer for READY Indicator

NE555 Delay-On Timer for READY Indicator prototype (Maker Style)

Level: Basic – Build an RC-timed delay circuit to activate a READY indicator seconds after power is applied.

Objective and use case

In this practical case, you will build a delay-on timer using the versatile NE555 integrated circuit. Upon applying 5 V power, an RC network dictates a waiting period before the timer’s output activates and turns on a «READY» LED.

This timer topology is highly useful in real-world applications:
* Audio amplifiers: Delaying speaker connection until internal voltages stabilize to prevent loud popping noises.
* Power supply sequencing: Ensuring primary rails are fully powered before activating secondary logic circuits.
* Microcontroller resets: Holding a reset line active for a brief period during startup to guarantee clean initialization.

Expected outcome:
* At power-on ($t=0$), the LED will remain OFF.
* The voltage at the timing node (VCAP) will exponentially decay from 5 V down to 1.66 V (which is 1/3 VCC).
* Once VCAP crosses the 1.66 V threshold, the NE555 output (VOUT) will snap from 0 V to 5 V (HIGH), illuminating the LED.
* The delay time will be approximately 5.1 seconds.

Target audience and level: Beginners learning analog-digital timing and RC time constants.

Materials

  • U1: NE555 timer IC, function: timing controller
  • R1: 100 kΩ resistor, function: timing resistor
  • C1: 47 µF electrolytic capacitor, function: timing capacitor
  • R2: 330 Ω resistor, function: LED current limiting
  • C2: 10 nF ceramic capacitor, function: control voltage stabilization
  • D1: green LED, function: READY indicator
  • V1: 5 V DC supply

Pin-out of the IC used

NE555 Timer IC

PinNameLogic/Analog functionConnection in this case
1GNDGround referenceNode 0
2TRIGTrigger input (active low, < 1/3 VCC)Node VCAP
3OUTOutputNode VOUT
4RESETReset input (active low)Node VCC
5CTRLControl voltage accessNode VCTRL
6THRThreshold input (active high, > 2/3 VCC)Node VCAP
7DISCHDischarge open-collectorNot connected
8VCCSupply voltageNode VCC

Wiring guide

  • V1: connects between VCC (+5 V) and 0 (GND).
  • C1: connects between VCC (positive leg) and VCAP (negative leg).
  • R1: connects between VCAP and 0.
  • U1 connections:
  • Pin 1 (GND) connects to 0.
  • Pin 2 (TRIG) connects to VCAP.
  • Pin 3 (OUT) connects to VOUT.
  • Pin 4 (RESET) connects to VCC.
  • Pin 5 (CTRL) connects to VCTRL.
  • Pin 6 (THR) connects to VCAP.
  • Pin 8 (VCC) connects to VCC.
  • C2: connects between VCTRL and 0.
  • R2: connects between VOUT and VLED.
  • D1: connects between VLED (anode) and 0 (cathode).

Conceptual block diagram

Conceptual block diagram — NE555 NE555 Timer
Quick read: inputs → main block → output (actuator or measurement). This summarizes the ASCII schematic below.

Schematic

[ VCC: 5 V ] --> [ C1: 47µF ] --(VCAP)--> [ U1: NE555 Timer ] --(VOUT)--> [ R2: 330 Ω ] --(VLED)--> [ D1: Green LED ] --> GND
                                         [ Pin 2: TRIG     ]
[ VCAP Node ] -> [ R1: 100 kΩ ] -> GND    [ Pin 6: THR      ]
                                         [ Pin 4: RESET    ] <--- [ VCC: 5 V ]
                                         [ Pin 8: VCC      ] <--- [ VCC: 5 V ]
                                         [ Pin 5: CTRL     ] --(VCTRL)--> [ C2: 10nF ] --> GND
                                         [ Pin 1: GND      ] ---> GND
Electrical Schematic

Measurements and tests

To validate the transient behavior of this delay-on timer, perform the following steps:

  1. Initial State Verification: Ensure power is completely disconnected. Use a multimeter or oscilloscope to confirm that VCAP and VOUT are at 0 V.
  2. Apply Power: Turn on the 5 V supply (V1). Start a stopwatch immediately. Verify that VOUT is initially ~0 V and the LED is OFF.
  3. Transient Validation of VCAP: Measure the voltage at node VCAP with respect to ground (0). Because the capacitor C1 is tied to VCC, it acts as a short circuit at $t=0$, pulling VCAP to 5 V. As C1 charges through R1, observe VCAP exponentially decaying toward 0 V.
  4. Trigger Threshold: Monitor VCAP as it drops. Exactly as it crosses 1.66 V (1/3 of VCC), verify that VOUT instantly jumps to 5 V and the READY LED illuminates.
  5. Timing Calculation: Verify the elapsed time. The theoretical delay for this configuration is calculated as T ≈ 1.1 × R × C. With 100 kΩ and 47 µF, T ≈ 5.17 seconds. Check that your measured time aligns with this estimate.

SPICE netlist and simulation

Reference SPICE Netlist (ngspice) — excerptFull SPICE netlist (ngspice)

* Practical case: NE555 Delay-On Timer for READY Indicator
.width out=256

* Power Supply (Pulse to simulate power-on and provide dynamic stimulus)
V1 VCC 0 PULSE(0 5 0 100u 100u 10 10)

* Timing Capacitor and Resistor
C1 VCC VCAP 47uF
R1 VCAP 0 100k

* Control Voltage Stabilization Capacitor
C2 VCTRL 0 10nF

* Output Current Limiting Resistor and LED
R2 VOUT VLED 330
D1 VLED 0 DLED

* NE555 Timer IC Instantiation
* Wiring: Pin 1 (GND)=0, Pin 2 (TRIG)=VCAP, Pin 3 (OUT)=VOUT, Pin 4 (RESET)=VCC, Pin 5 (CTRL)=VCTRL, Pin 6 (THR)=VCAP, Pin 8 (VCC)=VCC
XU1 0 VCAP VOUT VCC VCTRL VCAP VCC NE555
* ... (truncated in public view) ...

Copy this content into a .cir file and run with ngspice.

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* Practical case: NE555 Delay-On Timer for READY Indicator
.width out=256

* Power Supply (Pulse to simulate power-on and provide dynamic stimulus)
V1 VCC 0 PULSE(0 5 0 100u 100u 10 10)

* Timing Capacitor and Resistor
C1 VCC VCAP 47uF
R1 VCAP 0 100k

* Control Voltage Stabilization Capacitor
C2 VCTRL 0 10nF

* Output Current Limiting Resistor and LED
R2 VOUT VLED 330
D1 VLED 0 DLED

* NE555 Timer IC Instantiation
* Wiring: Pin 1 (GND)=0, Pin 2 (TRIG)=VCAP, Pin 3 (OUT)=VOUT, Pin 4 (RESET)=VCC, Pin 5 (CTRL)=VCTRL, Pin 6 (THR)=VCAP, Pin 8 (VCC)=VCC
XU1 0 VCAP VOUT VCC VCTRL VCAP VCC NE555

* LED Model
.model DLED D(IS=1e-15 N=2.0 RS=10)

* NE555 Subcircuit (Robust Continuous Behavioral Model)
.subckt NE555 GND TRIG OUT RESET CTRL THR VCC
* Internal voltage divider
R1 VCC CTRL 5k
R2 CTRL N1 5k
R3 N1 GND 5k

* Smooth Comparators using tanh to prevent convergence issues
B_TH COMP_TH GND V=0.5*(1+tanh((V(THR)-V(CTRL))*100))
B_TR COMP_TR GND V=0.5*(1+tanh((V(N1)-V(TRIG))*100))
B_RST RST_INT GND V=0.5*(1+tanh((0.7-V(RESET))*100))

* Continuous SR Latch State Equation
B_Q Q_IN GND V=V(COMP_TR) + V(Q_OUT)*(1-V(COMP_TH)) - V(RST_INT)
R4 Q_IN Q_NODE 1k
C3 Q_NODE GND 1nF
B_Q_OUT Q_OUT GND V=0.5*(1+tanh((V(Q_NODE)-0.5)*10))

* Output stage with small series resistance
B_OUT OUT_INT GND V=V(VCC)*V(Q_OUT)
R_OUT OUT_INT OUT 10
.ends

* Transient Analysis
.op
.tran 10m 10
.print tran V(VCC) V(VOUT) V(VCAP) V(VLED) V(VCTRL)

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)
Analysis: The transient analysis spans 0 s to 10 s and captures the switching interval. Main ranges: v(vout) -4.47e-08 uV -> 4.9 V; v(vctrl) 0 uV -> 3.33 V; v(vcap) 0 uV -> 5 V.
Show raw data table (1048 rows)
Index   time            v(vcc)          v(vout)         v(vcap)         v(vled)         v(vctrl)
0	0.000000e+00	0.000000e+00	4.832629e-31	0.000000e+00	1.643094e-29	0.000000e+00
1	1.000000e-06	5.000000e-02	2.776793e-25	4.999999e-02	2.777048e-25	9.708738e-04
2	1.084000e-06	5.420000e-02	5.111901e-13	5.419999e-02	5.111901e-13	1.059260e-03
3	1.252000e-06	6.260000e-02	2.888571e-13	6.259999e-02	2.888571e-13	1.249666e-03
4	1.588000e-06	7.940000e-02	1.193784e-13	7.939999e-02	1.193784e-13	1.711860e-03
5	2.260000e-06	1.130000e-01	3.159549e-15	1.130000e-01	3.159549e-15	2.957719e-03
6	3.604000e-06	1.802000e-01	-4.46777e-14	1.801999e-01	-4.46777e-14	6.703556e-03
7	5.753920e-06	2.876960e-01	1.153350e-14	2.876958e-01	1.153350e-14	1.602982e-02
8	8.529919e-06	4.264960e-01	3.920905e-14	4.264956e-01	3.920905e-14	3.378163e-02
9	1.323373e-05	6.616863e-01	6.229971e-14	6.616853e-01	6.229971e-14	7.714122e-02
10	1.776006e-05	8.880031e-01	7.679640e-08	8.880014e-01	7.679640e-08	1.330167e-01
11	2.207156e-05	1.103578e+00	4.718975e-04	1.103575e+00	4.718975e-04	1.975078e-01
12	2.551739e-05	1.275870e+00	3.176107e-05	1.275866e+00	3.176107e-05	2.560560e-01
13	2.635388e-05	1.317694e+00	4.676638e-05	1.317690e+00	4.676638e-05	2.711361e-01
14	2.687674e-05	1.343837e+00	5.278079e-05	1.343833e+00	5.278079e-05	2.807240e-01
15	2.751921e-05	1.375961e+00	5.781702e-05	1.375957e+00	5.781702e-05	2.926720e-01
16	2.815313e-05	1.407657e+00	6.142719e-05	1.407652e+00	6.142719e-05	3.046382e-01
17	2.880258e-05	1.440129e+00	6.412060e-05	1.440125e+00	6.412060e-05	3.170766e-01
18	2.949081e-05	1.474541e+00	6.629097e-05	1.474536e+00	6.629097e-05	3.304515e-01
19	3.016263e-05	1.508132e+00	6.813606e-05	1.508127e+00	6.813606e-05	3.436961e-01
20	3.083350e-05	1.541675e+00	6.982103e-05	1.541670e+00	6.982103e-05	3.571040e-01
21	3.149330e-05	1.574665e+00	7.140022e-05	1.574660e+00	7.140022e-05	3.704649e-01
22	3.216372e-05	1.608186e+00	7.296437e-05	1.608181e+00	7.296437e-05	3.842142e-01
23	3.283050e-05	1.641525e+00	7.449937e-05	1.641519e+00	7.449937e-05	3.980585e-01
... (1024 more rows) ...


Reference SPICE netlist (ngspice)

* Practical case: NE555 Delay-On Timer for READY Indicator
.width out=256

* Power Supply (Pulse to simulate power-on and provide dynamic stimulus)
V1 VCC 0 PULSE(0 5 0 100u 100u 10 10)

* Timing Capacitor and Resistor
C1 VCC VCAP 47uF
R1 VCAP 0 100k

* Control Voltage Stabilization Capacitor
C2 VCTRL 0 10nF

* Output Current Limiting Resistor and LED
R2 VOUT VLED 330
D1 VLED 0 DLED

* NE555 Timer IC Instantiation
* Wiring: Pin 1 (GND)=0, Pin 2 (TRIG)=VCAP, Pin 3 (OUT)=VOUT, Pin 4 (RESET)=VCC, Pin 5 (CTRL)=VCTRL, Pin 6 (THR)=VCAP, Pin 8 (VCC)=VCC
XU1 0 VCAP VOUT VCC VCTRL VCAP VCC NE555

* LED Model
.model DLED D(IS=1e-15 N=2.0 RS=10)

* NE555 Subcircuit (Robust Continuous Behavioral Model)
.subckt NE555 GND TRIG OUT RESET CTRL THR VCC
* Internal voltage divider
R1 VCC CTRL 5k
R2 CTRL N1 5k
R3 N1 GND 5k

* Smooth Comparators using tanh to prevent convergence issues
B_TH COMP_TH GND V=0.5*(1+tanh((V(THR)-V(CTRL))*100))
B_TR COMP_TR GND V=0.5*(1+tanh((V(N1)-V(TRIG))*100))
B_RST RST_INT GND V=0.5*(1+tanh((0.7-V(RESET))*100))

* Continuous SR Latch State Equation
B_Q Q_IN GND V=V(COMP_TR) + V(Q_OUT)*(1-V(COMP_TH)) - V(RST_INT)
R4 Q_IN Q_NODE 1k
C3 Q_NODE GND 1nF
B_Q_OUT Q_OUT GND V=0.5*(1+tanh((V(Q_NODE)-0.5)*10))

* Output stage with small series resistance
B_OUT OUT_INT GND V=V(VCC)*V(Q_OUT)
R_OUT OUT_INT OUT 10
.ends

* Transient Analysis
.op
.tran 10m 10
.print tran V(VCC) V(VOUT) V(VCAP) V(VLED) V(VCTRL)

Simulation Results (Transient Analysis)

Simulation Results (Transient Analysis)
Analysis: The transient analysis spans 0 s to 10 s and captures the switching interval. Main ranges: v(vout) -4.47e-08 uV -> 4.9 V; v(vctrl) 0 uV -> 3.33 V; v(vcap) 0 uV -> 5 V.

Common mistakes and how to avoid them

  • Reversing the R and C positions: Connecting R1 to VCC and C1 to 0 creates a delay-off timer rather than a delay-on timer. Ensure C1 connects strictly to VCC and R1 to 0 to achieve the desired power-on delay.
  • Leaving the RESET pin floating: An unconnected Pin 4 can pick up ambient electrical noise, causing the timer to reset randomly and preventing the LED from turning on. Always tie Pin 4 directly to VCC.
  • Electrolytic capacitor reverse polarity: In this specific configuration, the positive terminal of C1 must go to VCC and the negative terminal to VCAP. Reversing this will cause high leakage current, drastically altering the delay time or destroying the capacitor.


Troubleshooting

  • Symptom: LED turns on instantly without delay.
    • Cause: C1 is internally shorted, or the R1/C1 components were swapped.
    • Fix: Double-check the wiring of nodes VCAP, VCC, and 0. Replace C1 if a short is suspected.
  • Symptom: LED never turns on.
    • Cause: VCAP never drops below 1.66 V. This usually happens if C1 has excessive leakage current, essentially forming a voltage divider with R1. It can also occur if the LED (D1) is inserted backwards.
    • Fix: Ensure LED polarity is correct (anode to R2, cathode to 0). Use a higher quality capacitor or decrease R1 (while correspondingly increasing C1 to maintain the same time constant) to overcome leakage.
  • Symptom: Delay time is significantly shorter or longer than 5 seconds.
    • Cause: Standard electrolytic capacitors have wide tolerances (often \pm 20\% or worse).
    • Fix: This is normal behavior for basic components. For precision timing, swap the electrolytic capacitor for a tantalum or film capacitor with a tighter tolerance.

Possible improvements and extensions

  • Adjustable Delay: Replace R1 with a 10 kΩ fixed resistor in series with a 500 kΩ potentiometer. This allows manual calibration of the wait time from a fraction of a second up to nearly 30 seconds.
  • Rapid Reset Capability: Add a diode (e.g., 1N4148) in parallel with C1 (anode to VCAP, cathode to VCC). If power is momentarily lost, the diode will instantly discharge the capacitor, ensuring the timer reliably restarts its full delay sequence upon immediate repowering.

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Quick Quiz

Question 1: What is the main objective of the circuit described in the article?




Question 2: What happens to the LED exactly at power-on (t=0)?




Question 3: What is the approximate delay time before the LED illuminates?




Question 4: According to the article, why is this delay timer useful in audio amplifiers?




Question 5: What dictates the waiting period before the timer's output activates?




Question 6: How is this timer topology useful for power supply sequencing?




Question 7: At what voltage threshold does the NE555 output snap from 0 V to 5 V?




Question 8: Why might this circuit be used for microcontroller resets?




Question 9: How does the voltage at the timing node (VCAP) behave before the LED turns on?




Question 10: What is the stated difficulty level of this practical case?




Carlos Núñez Zorrilla
Carlos Núñez Zorrilla
Electronics & Computer Engineer

Telecommunications Electronics Engineer and Computer Engineer (official degrees in Spain).

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