Practical case: 2-Bit Binary Counter with End-of-Cycle

Objective and use case

In this practical case, you will build a 2-bit digital counter using a 74HC393 IC and decode its maximum state (binary 11, decimal 3) using a 74HC08 AND gate. A simulated clock pushbutton increments the count, while a manual reset pushbutton forces the counter back to zero.

Why this is useful:
* Demonstrates how sequential logic (counters) tracks discrete events over time.
* Shows how combinational logic (AND gate) is used to decode specific binary states and trigger events.
* Provides a foundational understanding of clock edge triggering and asynchronous resets.
* Acts as a building block for state machines, timers, and step-sequencers in industrial or hobbyist electronics.

Expected outcome:
* Pressing and releasing the clock button will advance the binary state sequentially: 00 → 01 → 10 → 11.
* Two LEDs will display the current binary count (LSB and MSB).
* A third LED (end-of-cycle indicator) will light up strictly when the count reaches state 3.
* Pressing the reset button will immediately extinguish all LEDs, returning the circuit to state 00 regardless of the current count.
* Target audience: Electronics beginners learning digital logic and basic state tracking.

Materials

• V1: 5 V DC supply
• S1: normally open pushbutton, function: clock pulse generator
• S2: normally open pushbutton, function: manual reset trigger
• R1: 10 kΩ resistor, function: pull-down for CLK node
• R2: 10 kΩ resistor, function: pull-down for MR node
• R3: 330 Ω resistor, function: current limiting for QA LED
• R4: 330 Ω resistor, function: current limiting for QB LED
• R5: 330 Ω resistor, function: current limiting for MAX_VAL LED
• D1: green LED, function: LSB indicator (QA)
• D2: yellow LED, function: MSB indicator (QB)
• D3: red LED, function: end-of-cycle indicator
• U1: 74HC393 dual 4-bit binary counter, function: state counting
• U2: 74HC08 quad 2-input AND gate, function: state decoding

Wiring guide

• V1: connects between VCC and 0.
• S1: connects between VCC and CLK.
• R1: connects between CLK and 0.
• S2: connects between VCC and MR.
• R2: connects between MR and 0.
• U1: Pin 1 connects to CLK, Pin 2 connects to MR, Pin 3 connects to QA, Pin 4 connects to QB, Pin 7 connects to 0, Pin 14 connects to VCC.
• U2: Pin 1 connects to QA, Pin 2 connects to QB, Pin 3 connects to MAX_VAL, Pin 7 connects to 0, Pin 14 connects to VCC.
• R3: connects between QA and N_D1.
• D1: connects between N_D1 and 0 (anode to N_D1, cathode to 0).
• R4: connects between QB and N_D2.
• D2: connects between N_D2 and 0 (anode to N_D2, cathode to 0).
• R5: connects between MAX_VAL and N_D3.
• D3: connects between N_D3 and 0 (anode to N_D3, cathode to 0).

Conceptual block diagram

Measurements and tests

1. Initial State Check: Power on the circuit. If any LEDs are lit, press and release S2 (Master Reset). The voltage at the MR node will spike to 5 V, clearing the counter. Measure QA, QB, and MAX_VAL; all should be 0 V. All LEDs must be OFF.
2. First Clock Pulse (State 1): Press and hold S1. The CLK node goes to 5 V. Release S1. The 74HC393 triggers on the falling edge (high-to-low transition). D1 (QA) should turn on. D2 (QB) and D3 (MAX_VAL) remain off.
3. Second Clock Pulse (State 2): Press and release S1 again. D1 turns off and D2 turns on. This represents binary 10 (decimal 2).
4. Third Clock Pulse (State 3): Press and release S1 a third time. Both D1 (QA) and D2 (QB) turn on. Consequently, inputs 1 A and 1B on the 74HC08 are both HIGH. The MAX_VAL node will output 5 V, lighting up the end-of-cycle LED (D3).
5. Rollover (State 0): Press and release S1 a fourth time. The counter overflows the 2-bit capacity represented by QA and QB. Both counting LEDs and the MAX_VAL LED will turn off.
6. Asynchronous Reset Verification: Cycle the counter to state 2 or 3. Press the reset button S2. Observe that the counter immediately resets to 00 without waiting for a clock pulse.

Common mistakes and how to avoid them

• Ignoring switch bounce: Mechanical pushbuttons exhibit «bounce,» creating multiple rapid voltage transitions on a single press. This causes the counter to skip numbers. Avoid this in critical applications by using a hardware debounce circuit (like an RC filter followed by a Schmitt trigger).
• Misunderstanding the clock edge: The 74HC393 increments on the falling edge of the clock signal. Beginners often expect the count to increase the moment the button is pressed, but it actually increases the moment the button is released (when the voltage drops from 5 V to 0 V).
• Leaving unused logic inputs floating: While this basic test circuit focuses on the used gates, leaving the inputs of the unused gates on the 74HC393 and 74HC08 floating can cause internal oscillation and excessive power draw. Always tie unused inputs to GND or VCC.

Troubleshooting

• Symptom: The counter jumps randomly (e.g., skips from 0 to 2 or 3).
• Cause: Mechanical switch bounce on S1 is sending multiple clock pulses instantly.
• Fix: Add a 100 nF capacitor in parallel with R1 to filter out the rapid mechanical bounces, or press the button very deliberately.
• Symptom: The counter never increments; LEDs remain off.
• Cause: The master reset pin is stuck HIGH, keeping the counter constantly cleared.
• Fix: Check R2. Ensure it is firmly connected to GND to pull the MR node LOW when the reset button is not pressed.
• Symptom: LEDs D1 and D2 count correctly, but D3 never turns on.
• Cause: The 74HC08 AND gate is not receiving power, or its inputs are incorrectly wired.
• Fix: Verify that pins 14 (VCC) and 7 (GND) of U2 are connected. Double-check that pin 1 connects to QA and pin 2 connects to QB.
• Symptom: LEDs are very dim or burn out instantly.
• Cause: Incorrect or missing current-limiting resistors.
• Fix: Ensure R3, R4, and R5 (330 Ω) are properly placed in series with the respective LED anodes.